HD6417727F100V Renesas Electronics America, HD6417727F100V Datasheet - Page 910

MPU 3V 16K PB-FREE 240-QFP

HD6417727F100V

Manufacturer Part Number
HD6417727F100V
Description
MPU 3V 16K PB-FREE 240-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100V

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F100V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 27 I/O Ports
27.7
Each pin has an input pullup MOS, which is controlled by Port H Control Register (PHCR) in
PFC.
27.7.1
Note: * Undefined
Port H Data Register (PHDR) is a 1-bit read/write and 7-bit read register that stores data for pins
PTH7 to PTH0. PH7DT to PH0DT bit corresponds to PTH7 to PTH0 pin. When the pin function
is general output port, if the port is read, the value of the corresponding PHDR bit is returned
directly. When the function is general input port, if the port is read, the corresponding pin level is
read. Table 27.6 shows the function of PHDR.
When ASEMD0 is equal to 1, after PHDR is initialized to B'0******* by a power-on reset, the
general input port function (pullup MOS: on) is set as the initial pin function, and the
corresponding pin levels are fetched. It retains its previous value in standby mode and sleep mode,
and by a manual reset.
Rev.6.00 Mar. 27, 2009 Page 852 of 1036
REJ09B0254-0600
Initial value:
Port H
Port H Data Register (PHDR)
R/W:
Bit:
PH7DT
R/W
7
0
PH6DT
R
6
*
PH5DT
R
5
*
PH4DT
R
4
*
PH3DT
R
3
*
PH2DT
R
2
*
PH1DT
R
1
*
PH0DT
R
0
*

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