R8A77850AADBGV Renesas Electronics America, R8A77850AADBGV Datasheet - Page 209
R8A77850AADBGV
Manufacturer Part Number
R8A77850AADBGV
Description
IC SUPERH MCU 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850AADBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850AADBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 209 of 1694
- Download datasheet (9Mb)
7.5
7.5.1
This LSI supports the following MMU functions.
1. The MMU decodes the virtual address to be accessed by software, and performs address
2. The MMU determines the cache access status on the basis of the page management
3. If address translation cannot be performed normally in a data access or instruction access, the
4. If address translation information is not recorded in the ITLB in an instruction access, the
7.5.2
Software processing for the MMU consists of the following:
1. Setting of MMU-related registers. Some registers are also partially updated by hardware
2. Recording, deletion, and reading of TLB entries. There are two methods of recording UTLB
3. MMU exception handling. When an MMU exception occurs, processing is performed based on
translation by controlling the UTLB/ITLB in accordance with the MMUCR settings.
information read during address translation (C and WT bits).
MMU notifies software by means of an MMU exception.
MMU searches the UTLB. If the necessary address translation information is recorded in the
UTLB, the MMU copies this information into the ITLB in accordance with the LRUI bit
setting in MMUCR.
automatically.
entries: by using the LDTLB instruction, or by writing directly to the memory-mapped UTLB.
ITLB entries can only be recorded by writing directly to the memory-mapped ITLB. Deleting
or reading UTLB/ITLB entries is enabled by accessing the memory-mapped UTLB/ITLB.
information set by hardware.
MMU Functions
MMU Hardware Management
MMU Software Management
Rev.1.00 Jan. 10, 2008 Page 177 of 1658
7. Memory Management Unit (MMU)
REJ09B0261-0100
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