UPD70F3743GJ-GAE-AX Renesas Electronics America, UPD70F3743GJ-GAE-AX Datasheet - Page 18

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UPD70F3743GJ-GAE-AX

Manufacturer Part Number
UPD70F3743GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3743GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3743GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3743GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
Internal
memory
Memory
space
External bus interface
General-purpose register
Main clock (oscillation frequency)
Subclock (oscillation frequency)
Internal oscillator
Minimum instruction execution time
DSP function
I/O port
Timer
Real-time output port
A/D converter
D/A converter
Serial interface
DMA controller
Interrupt source
Power save function
Reset
DCU
Operating power supply voltage
Operating ambient temperature
Package
Note The figure in parentheses indicates the number of external interrupts that can release the STOP mode.
Part Number
Flash memory
RAM
Logical space
External memory area
Address bus: 24 bits
Data bus: 8/16 bits
Multiplex bus mode/separate bus mode
Chip select signal: 4
32 bits × 32 registers
Ceramic/crystal
(in PLL mode: f
in clock through mode: f
Crystal (f
f
31.25 ns (main clock (f
32 × 32 = 64: 125 to 156.25 ns (at 32 MHz)
32 × 32 + 32 = 32: 187.5 ns (at 32 MHz)
16 × 16 = 32: 31.25 to 62.5 ns (at 32 MHz)
16 × 16 + 32 = 32: 93.75 ns (at 32 MHz)
I/O: 128 (5 V tolerant/N-ch open-drain output selectable: 60)
16-bit timer/event counter P: 9 channels
16-bit timer/event counter Q: 1 channel
16-bit interval timer M:
Watch timer:
Watchdog timer :
6 bits × 2 channels
10-bit resolution × 16 channels
8-bit resolution × 2 channels
UART:
UART/CSI:
UART/I
CSI:
CSI/I
4 channels (transfer target: on-chip peripheral I/O, internal RAM, external memory)
External: 10 (10)
HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
RESET pin input, watchdog timer 2 (WDT2), clock monitor (CLM), low-voltage detector (LVI)
Provided (RUN/break)
2.85 to 3.6 V
−40 to +85°C
144-pin plastic LQFP (fine pitch) (20 × 20 mm)
R
= 220 kHz (TYP.)
μ
2
PD70F3743
C bus:
384 KB
2
32 KB
C bus: 2 channels
Table 1-1. V850ES/JJ3 Product List
XT
= 32.768 kHz)
X
1 channel
1 channel
4 channels
1 channel
Note
= 2.5 to 5 MHz (multiplied by 4) or f
, internal: 61
XX
X
) = 32 MHz)
= 2.5 to 10 MHz)
μ
PD70F3744
1 channel
1 channel
1 channel
512 KB
40 KB
64 MB
16 MB
μ
X
PD70F3745
= 2.5 to 4 MHz (multiplied by 8),
768 KB
60 KB
CHAPTER 1 INTRODUCTION
μ
PD70F3746
1024 KB
60 KB
Page 2 of 892

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