UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 232
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 232 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) Anytime write and batch write
With TAAn, the TAAnCCR0 and TAAnCCR1 registers can be rewritten during timer operation (TAAnCTL0.TAAnCE
bit = 1), but the write method (anytime write, batch write) of the CCR0 and CCR1 buffer registers differs depending
on the mode.
(a) Anytime write
Figure 7-3. Example of Basic Anytime Write Operation Flowchart (Interval Timer Mode of TAA0)
In this mode, data is transferred at any time from the TAAnCCR0 and TAAnCCR1 registers to the CCR0 and
CCR1 buffer registers during timer operation.
• Set values to TAACCRn register
• Timer operation enable
→ Transfer to CCRn buffer register
Note The 16-bit counter is not cleared upon a match between the 16-bit counter value
Remark
Timer operation
• Match between 16-bit counter
• Match between 16-bit counter
• 16-bit counter clear & start
(TAA0CE bit = 1)
→ Transfer values of TAA0CCRn
and CCR1 buffer register
and CCR0 buffer register
register to CCRn buffer
register
TAA0CCRn register rewrite
and the CCR1 buffer register value. It is cleared upon a match between the 16-bit
counter value and the CCR0 buffer register value.
Initial settings
n = 0, 1
START
Note
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
INTTAA0CC0 signal output
INTTAA0CC1 signal output
Page 232 of 1408
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