UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 255
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UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 255 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
7.5.3
bit is set to 1. When the valid edge of an external trigger input signal is detected, 16-bit timer/event counter AA starts
counting, and outputs a PWM waveform from the TOAAn1 pin.
trigger, a square wave that has one cycle of the PWM waveform as half its cycle can also be output from the TOAAn0 pin.
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
TIAAn0 pin
In the external trigger pulse output mode, 16-bit timer/event counter AA waits for a trigger when the TAAnCTL0.TAAnCE
Pulses can also be output by generating a software trigger instead of using the external trigger. When using a software
External trigger pulse output mode (TAAnMD2 to TAAnMD0 bits = 010)
Remark
selection
Count
clock
Software trigger
generation
TAAnCE bit
n = 0 to 3, 5
detector
Edge
Figure 7-21. Configuration in External Trigger Pulse Output Mode
control
Count
start
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
CCR1 buffer register
CCR0 buffer register
TAAnCCR1 register
TAAnCCR0 register
16-bit counter
Match signal
Match signal
Clear
Transfer
Transfer
S
R
controller
controller
Output
(RS-FF)
Output
INTTAAnCC1 signal
INTTAAnCC0 signal
Page 255 of 1408
TOAAn1 pin
TOAAn0 pin
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