UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 292
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 292 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(2) Operation timing in free-running timer mode
(a) Interval operation with TAAnCCRm register used as compare register
When 16-bit timer/event counter AA is used as an interval timer with the TAAnCCRm register used as a
compare register, software processing is necessary for setting a comparison value to generate the next
interrupt request signal each time the INTTAAnCCm signal has been detected.
When performing an interval operation in the free-running timer mode, two intervals can be set with one
channel.
To perform the interval operation, the value of the corresponding TAAnCCRm register must be re-set in the
interrupt servicing that is executed when the INTTAAnCCm signal is detected.
The set value for re-setting the TAAnCCRm register can be calculated by the following expression, where “D
is the interval period.
Remark
Compare register default value: D
Value set to compare register second and subsequent times: Previous set value + D
(If the calculation result is greater than FFFFH, subtract 10000H from the result and set this value to the
register.)
INTTAAnCC1 signal
INTTAAnCC0 signal
TAAnCCR1 register
TAAnCCR0 register
TOAAn1 pin output
TOAAn0 pin output
16-bit counter
TAAnCE bit
m = 0, 1
n = 0 to 3, 5
FFFFH
0000H
Interval period
Interval period
D
(D
(D
00
00
m
D
10
D
+ 1)
10
− 1
+ 1)
D
00
10
Interval period
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
(10000H +
D
01
Interval period
− D
(10000H +
D
D
D
00
11
)
01
01
− D
D
Interval period
10
D
11
(D
)
11
02
− D
D
Interval period
02
01
D
(10000H +
)
D
02
12
Interval period
− D
(10000H +
D
D
D
11
03
12
)
12
− D
D
03
02
D
)
Interval period
03
(10000H +
D
Interval period
13
(10000H +
D
− D
04
D
− D
12
D
13
)
D
13
03
04
)
D
m
04
D
D
14
05
Page 292 of 1408
m
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