DS5002FMN-16 Maxim Integrated Products, DS5002FMN-16 Datasheet - Page 15

IC MPU SECURE 16MHZ IND 80-TQFP

DS5002FMN-16

Manufacturer Part Number
DS5002FMN-16
Description
IC MPU SECURE 16MHZ IND 80-TQFP
Manufacturer
Maxim Integrated Products
Series
DS500xr
Datasheet

Specifications of DS5002FMN-16

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, WDT
Number Of I /o
32
Program Memory Type
SRAM
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-MQFP, 80-PQFP
Processor Series
DS5002
Core
8051
Data Bus Width
8 bit
Program Memory Size
32 KB, 64 KB, 128 KB
Data Ram Size
32 KB, 64 KB, 128 KB
Interface Type
UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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DS5002FP Secure Microprocessor Chip
SECURE OPERATION OVERVIEW
The DS5002FP incorporates encryption of the activity on its byte-wide address/data bus to prevent unauthorized
access to the program and data information contained in the NV RAM. Loading an application program in this
manner is performed by the bootstrap loader using the general sequence described below:
1) Clear security lock.
2) Set memory map configuration as for DS5001FP
3) Load application software
4) Set security lock
5) Exit loader
Loading of application software into the program/data RAM is performed while the DS5002FP is in its bootstrap
load mode. Loading is only possible when the security lock is clear. If the security lock has previously set, then it
must be cleared by issuing the “Z” command from the bootstrap loader. Resetting the security lock instantly clears
the previous key word and the contents of the Vector RAM. In addition, the bootstrap ROM writes 0’s into the first
32k of external RAM.
The user’s application software is loaded into external CMOS SRAM by the “L” command in “scrambled” form
through on-chip encryptor circuits. Each external RAM address is an encrypted representation of an on-chip logical
address. Thus, the sequential instructions of an ordinary program or data table are stored nonsequentially in RAM
memory. The contents of the program/data RAM are also encrypted. Each byte in RAM is encrypted by a key- and
address-dependent encryptor circuit such that identical bytes are stored as different values in different memory
locations.
The encryption of the program/data RAM is dependent on an on-chip 64-bit key word. The key is loaded by the
ROM firmware just prior to the time that the application software is loaded, and is retained as nonvolatile
information in the absence of V
by the lithium backup circuits. After loading is complete, the key is protected by
CC
setting the on-chip security lock, which is also retained as nonvolatile information in the absence of V
. Any
CC
attempt to tamper with the key word and thereby gain access to the true program/data RAM contents results in the
erasure of the key word as well as the RAM contents.
During execution of the application software, logical addresses on the DS5002FP that are generated from the
program counter or data pointer registers are encrypted before they are presented on the byte-wide address bus.
Op codes and data are read back and decrypted before they are operated on by the CPU. Similarly, data values
written to the external nonvolatile RAM storage during program execution are encrypted before they are presented
on the byte-wide data bus during the write operation. This encryption/decryption process is performed in real time
such that no execution time is lost as compared to the non-encrypted DS5001FP or 8051 running at the same
clock rate. As a result, operation of the encryptor circuitry is transparent to the application software.
Unlike the DS5000FP, the DS5002FP chip’s security feature is always enabled.
SECURITY CIRCUITRY
The on-chip functions associated with the DS5002FP’s software security feature are depicted in
Figure
9.
Encryption logic consists of an address encryptor and a data encryptor. Although each encryptor uses its own
algorithm for encrypting data, both depend on the 64-bit key word which is contained in the Encryption Key
registers. Both the encryptors operate during loading of the application software and also during its execution.
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