PIC18C242/JW Microchip Technology, PIC18C242/JW Datasheet - Page 103

IC MCU EPROM 8KX16 A/D 28CDIP

PIC18C242/JW

Manufacturer Part Number
PIC18C242/JW
Description
IC MCU EPROM 8KX16 A/D 28CDIP
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C242/JW

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
EPROM, UV
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-CDIP (0.300", 7.62mm) Window
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C242/JW
Manufacturer:
NS
Quantity:
10
11.0
The Timer2 module timer has the following features:
• 8-bit timer (TMR2 register)
• 8-bit period register (PR2)
• Readable and writable (both registers)
• Software programmable prescaler (1:1, 1:4, 1:16)
• Software programmable postscaler (1:1 to 1:16)
• Interrupt on TMR2 match of PR2
• SSP module optional use of TMR2 output to gen-
Timer2 has a control register shown in Register 11-1.
Timer2 can be shut-off by clearing control bit TMR2ON
(T2CON<2>)
Figure 11-1 is a simplified block diagram of the Timer2
module. Register 11-1 shows the Timer2 control regis-
ter. The prescaler and postscaler selection of Timer2
are controlled by this register.
REGISTER 11-1:
erate clock shift
2001 Microchip Technology Inc.
TIMER2 MODULE
bit 7
bit 6-3
bit 2
bit 1-0
to
minimize
bit 7
Unimplemented: Read as '0'
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
1111 = 1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
Legend:
R = Readable bit
- n = Value at POR reset
T2CON: TIMER2 CONTROL REGISTER
U-0
TOUTPS3 TOUTPS2
power
R/W-0
consumption.
R/W-0
W = Writable bit
’1’ = Bit is set
TOUTPS1
R/W-0
11.1
Timer2 can be used as the PWM time-base for the
PWM mode of the CCP module. The TMR2 register is
readable and writable, and is cleared on any device
RESET. The input clock (F
of 1:1, 1:4, or 1:16, selected by control bits
T2CKPS1:T2CKPS0 (T2CON<1:0>). The match out-
put of TMR2 goes through a 4-bit postscaler (which
gives a 1:1 to 1:16 scaling inclusive) to generate a
TMR2 interrupt (latched in flag bit TMR2IF, (PIR1<1>)).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device RESET (Power-on Reset, MCLR
TMR2 is not cleared when T2CON is written.
Reset, Watchdog Timer Reset, or Brown-out
Reset)
TOUTPS0
R/W-0
Timer2 Operation
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
TMR2ON
R/W-0
PIC18CXX2
OSC
/4) has a prescale option
T2CKPS1
x = Bit is unknown
R/W-0
DS39206C-page 101
T2CKPS0
R/W-0
bit 0

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