PIC17LC756AT-08/L Microchip Technology, PIC17LC756AT-08/L Datasheet - Page 228
![IC MCU OTP 16KX16 A/D 68PLCC](/photos/12/13/121323/c04-049_l_sml.jpg)
PIC17LC756AT-08/L
Manufacturer Part Number
PIC17LC756AT-08/L
Description
IC MCU OTP 16KX16 A/D 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Specifications of PIC17LC756AT-08/L
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Processor Series
PIC17LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
902 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
12 bit
Data Rom Size
902 B
Height
4.06 mm
Length
24.33 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Width
24.33 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17LC756AT-08/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C7XX
TABLRD
Example1:
Example2:
DS30289B-page 228
Before Instruction
After Instruction (table write completion)
Before Instruction
After Instruction (table write completion)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
Table Read
TABLRD
TABLRD
1, 1, REG ;
0, 0, REG ;
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
0x53
0xAA
0x55
0xA356
0x1234
0xAA
0x12
0x34
0xA357
0x5678
0x53
0xAA
0x55
0xA356
0x1234
0x55
0x12
0x34
0xA356
0x1234
TABLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Note:
operation
Decode
Q1
No
The MCLR/V
voltage for successful programming of internal
memory.
If MCLR/V
the programming sequence of internal memory
will be interrupted. A short write will occur (2
T
affected.
CY
). The internal memory location will not be
(Table Pointer
on Address
register 'f'
operation
Table Write
[ label ] TABLWT t,i,f
0
i
t
If t = 0,
f
If t = 1,
f
TBLAT
If i = 1,
TBLPTR + 1
If i = 0,
TBLPTR is unchanged
None
1.
2.
3.
1
2 (many if write is to on-chip
EPROM program memory)
Read
bus)
PP
Q2
No
1010
[0,1]
[0,1]
PP
f
= V
TBLATL;
TBLATH;
Load value in ’f’ into 16-bit table
latch (TBLAT)
If t = 1: load into high byte;
If t = 0: load into low byte
The contents of TBLAT are writ-
ten to the program memory
location pointed to by TBLPTR.
If TBLPTR points to external
program memory location, then
the instruction takes two-cycle.
If TBLPTR points to an internal
EPROM
instruction is terminated when
an interrupt is received.
The TBLPTR can be automati-
cally incremented
If i = 1; TBLPTR is not
If i = 0; TBLPTR is incremented
pin must be at the programming
2000 Microchip Technology Inc.
255
DD
Prog Mem (TBLPTR);
11ti
operation
Process
incremented
Data
Q3
No
location,
TBLPTR
ffff
(Table Latch on
WR goes low)
Address bus,
TBLATH or
operation
then
TBLATL
register
Write
Q4
No
ffff
the
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