ATMEGA163-8AI Atmel, ATMEGA163-8AI Datasheet - Page 57

• Manufacturer Part Number: ATMEGA163-8AI
• Description: IC AVR MCU 16K A/D 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Asynchronous Status
Register – ASSR
1142E–AVR–02/03
• Bit 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATmega163 and always read as zero.
• Bit 3 – AS2: Asynchronous Timer/Counter2
When AS2 is cleared (zero), Timer/Counter2 is clocked from the internal system clock,
CK. When AS2 is set (one), Timer/Counter2 is clocked from the PC6(TOSC1) pin. Pins
PC6 and PC7 are connected to a crystal Oscillator and cannot be used as general I/O
pins. When the value of this bit is changed, the contents of TCNT2, OCR2, and TCCR2
might be corrupted.
• Bit 2 – TCN2UB: Timer/Counter2 Update Busy
When Timer/Counter2 operates asynchronously and TCNT2 is written, this bit becomes
set (one). When TCNT2 has been updated from the temporary storage register, this bit
is cleared (zero) by hardware. A logical zero in this bit indicates that TCNT2 is ready to
be updated with a new value.
• Bit 1 – OCR2UB: Output Compare Register2 Update Busy
When Timer/Counter2 operates asynchronously and OCR2 is written, this bit becomes
set (one). When OCR2 has been updated from the temporary storage register, this bit is
cleared (zero) by hardware. A logical zero in this bit indicates that OCR2 is ready to be
updated with a new value.
• Bit 0 – TCR2UB: Timer/Counter Control Register2 Update Busy
When Timer/Counter2 operates asynchronously and TCCR2 is written, this bit becomes
set (one). When TCCR2 has been updated from the temporary storage register, this bit
is cleared (zero) by hardware. A logical zero in this bit indicates that TCCR2 is ready to
be updated with a new value.
If a write is performed to any of the three Timer/Counter2 Registers while its update
busy flag is set (one), the updated value might get corrupted and cause an unintentional
interrupt to occur.
The mechanisms for reading TCNT2, OCR2, and TCCR2 are different. When reading
TCNT2, the actual timer value is read. When reading OCR2 or TCCR2, the value in the
temporary storage register is read.
Bit
$22 ($22)
Read/Write
Initial Value
R
7
–
0
6
–
R
0
R
5
–
0
R
4
–
0
AS2
R/W
3
0
TCN2UB
R
2
0
ATmega163(L)
OCR2UB
R
1
0
TCR2UB
0
R
0
ASSR
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