ATMEGA163-8PC Atmel, ATMEGA163-8PC Datasheet - Page 87

• Manufacturer Part Number: ATMEGA163-8PC
• Description: IC AVR MCU 16K A/D 8MHZ 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Slave Receiver Mode
1142E–AVR–02/03
After a repeated START condition (state $10), the Two-wire Serial Interface may switch
to the Master Transmitter mode by loading TWDR with SLA+W or access a new Slave
as Master Receiver or Transmitter.
Assembly code illustrating operation of the Master Receiver mode is given at the end of
the TWI section.
In the Slave Receiver mode, a number of data bytes are received from a Master Trans-
mitter (see Figure 54). To initiate the Slave Receiver mode, TWAR and TWCR must be
initialized as follows:
Table 30. TWAR: Slave Receiver Mode Initialization
The upper seven bits are the address to which the Two-wire Serial Interface will respond
when addressed by a Master. If the LSB is set, the Two-wire Serial Interface will
respond to the general call address ($00), otherwise it will ignore the general call
address.
Table 31. WCR: Slave Receiver Mode Initialization
TWEN must be set to enable the Two-wire Serial Interface. The TWEA bit must be set to
enable the acknowledgement of the device’s own slave address or the general call
address. TWSTA and TWSTO must be cleared.
When TWAR and TWCR have been initialized, the Two-wire Serial Interface waits until
it is addressed by its own slave address (or the general call address if enabled) followed
by the Data Direction bit which must be “0” (write) for the Two-wire Serial Interface to
operate in the Slave Receiver mode. After its own slave address and the write bit have
been received, the Two-wire Serial Interface Interrupt Flag is set and a valid status code
can be read from TWSR. The status code is used to determine the appropriate software
action. The appropriate action to be taken for each status code is detailed in Table 34.
The Slave Receiver mode may also be entered if arbitration is lost while the Two-wire
Serial Interface is in the Master mode (see states $68 and $78).
If the TWEA bit is reset during a transfer, the Two-wire Serial Interface will return a “Not
Acknowledge” (“1”) to SDA after the next received data byte. While TWEA is Reset, the
Two-wire Serial Interface does not respond to its own slave address. However, the Two-
wire Serial Bus is still monitored and address recognition may resume at any time by
setting TWEA. This implies that the TWEA bit may be used to temporarily isolate the
Two-wire Serial Interface from the Two-wire Serial Bus.
In ADC Noise Reduction mode, Power-down mode, and Power-save mode, the clock
system to the Two-wire Serial Interface is turned off. If the Slave Receive mode is
enabled, the interface can still acknowledge a general call and its own slave address by
using the Two-wire Serial Bus clock as a clock source. The part will then wake-up from
sleep and the Two-wire Serial Interface will hold the SCL clock wil low during the wake-
up and until the TWINT Flag is cleared.
Note that the Two-wire Serial Interface Data Register – TWDR – does not reflect the last
byte present on the bus when waking up from these sleep modes.
Assembly code illustrating operation of the Slave Receiver mode is given at the end of
the TWI section.
TWAR
Value
TWCR
Value
TWINT
TWA6
0
TWEA
TWA5
1
TWSTA
TWA4
Device’s Own Slave Address
0
TWSTO
TWA3
0
TWWC
TWA2
0
ATmega163(L)
TWEN
TWA1
1
TWA0
–
0
TWGCE
TWIE
X
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