ATTINY12V-1PC Atmel, ATTINY12V-1PC Datasheet - Page 23
![IC AVR MCU 1MHZ 1.8V 8DIP](/photos/6/50/65033/313-8-dip_sml.jpg)
ATTINY12V-1PC
Manufacturer Part Number
ATTINY12V-1PC
Description
IC AVR MCU 1MHZ 1.8V 8DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY12V-1PC
Core Processor
AVR
Core Size
8-Bit
Speed
1.2MHz
Peripherals
POR, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Ram Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
No
Other names
ATTINY12V1PC
Power-on Reset for the
ATtiny11
1006F–AVR–06/07
A Power-on Reset (POR) circuit ensures that the device is reset from power-on. As
shown in Figure 15, an internal timer is clocked from the watchdog timer. This timer pre-
vents the MCU from starting a certain period after V
Threshold Voltage – V
period – t
start-up time.The start-up times for the different clock options are shown in the following
table. The Watchdog Oscillator is used for timing the start-up time, and this oscillator is
voltage dependent as shown in the section “ATtiny11 Typical Characteristics” on page
62.
Table 8. Start-up Times for the ATtiny11 (V
If the built-in start-up delay is sufficient, RESET can be connected to V
an external pull-up resistor. By holding the RESET pin low for a period after V
been applied, the Power-on Reset period can be extended. Refer to Figure 18 for a tim-
ing example on this.
Selected Clock Option
External Crystal
External Ceramic Resonator
External Low-frequency Crystal
External RC Oscillator
Internal RC Oscillator
External Clock
TOUT
. The FSTRT fuse bit in the Flash can be programmed to give a shorter
POT
. See Figure 17. The total reset period is the Delay Time-out
FSTRT Unprogrammed
4.2 ms
4.2 ms
4.2 ms
67 ms
67 ms
CC
4.2 s
= 2.7V)
Start-up Time t
CC
has reached the Power-on
2 clocks from power-down
FSTRT Programmed
ATtiny11/12
5 clocks from reset,
TOUT
4.2 ms
4.2 ms
67 µs
67 µs
CC
4.2 s
directly or via
CC
has
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