ATMEGA128L-8AI Atmel, ATMEGA128L-8AI Datasheet - Page 12
![IC AVR MCU 128K 8MHZ LV 64-TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA128L-8AI
Manufacturer Part Number
ATMEGA128L-8AI
Description
IC AVR MCU 128K 8MHZ LV 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128L-8AI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA128L8AI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA128L-8AI
Manufacturer:
AT
Quantity:
35
Part Number:
ATMEGA128L-8AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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X-register, Y-register,
and Z-register
12
ATmega128
Figure 4. AVR CPU General Purpose Working Registers
Most of the instructions operating on the Register file have direct access to all registers, and
most of them are single cycle instructions.
As shown in
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides great flexibility in access of the
registers, as the X-, Y-, and Z-pointer Registers can be set to index any register in the file.
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are 16-bit address pointers for indirect addressing of the Data Space. The three indirect
address registers X, Y, and Z are described in
Figure 5. The X-, Y-, and Z-registers
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the Instruction Set Reference for details).
X - register
Y - register
Z - register
Registers
Purpose
Working
General
Figure
15
7
R27 ($1B)
15
7
R29 ($1D)
15
7
R31 ($1F)
4, each register is also assigned a data memory address, mapping them
7
XH
YH
ZH
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
…
…
0
Figure
0
0
0
7
R26 ($1A)
7
R28 ($1C)
7
R30 ($1E)
5.
Addr.
$0D
$0E
$0F
$1A
$1B
$1C
$1D
$1E
$1F
$00
$01
$02
$10
$11
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Y-register Low Byte
Z-register Low Byte
XL
YL
ZL
2467V–AVR–02/11
0
0
0
0
0
0
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