ATMEGA161L-4PC Atmel, ATMEGA161L-4PC Datasheet - Page 116
ATMEGA161L-4PC
Manufacturer Part Number
ATMEGA161L-4PC
Description
IC AVR MCU 16K LV 4MHZ COM 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA161-8AC.pdf
(159 pages)
Specifications of ATMEGA161L-4PC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Program Memory
Lock bits
Fuse bits
116
ATmega161(L)
The ATmega161 MCU provides six Lock bits that can be left unprogrammed (“1”) or can
be programmed (“0”) to obtain the additional features listed in Table 40. The Lock bits
can only be erased to “1” with the Chip Erase command.
Table 40. Lock Bit Protection Modes
Note:
The ATmega161 has six Fuse bits: BOOTRST, SPIEN, SUT, and CKSEL [2:0].
•
•
•
BLB0 Mode
BLB1 Mode
LB Mode
When BOOTRST is programmed (“0”), the Reset Vector is set to address $1E00,
which is the first address location in the Boot Loader section of the Flash. If the
BOOTRST is unprogrammed (“1”), the Reset Vector is set to address $0000. Default
value is unprogrammed (“1”).
When the SPIEN Fuse is programmed (“0”), Serial Program and Data Downloading
is enabled. Default value is programmed (“0”). The SPIEN Fuse is not accessible in
Serial Programming mode.
The SUT Fuse changes the start-up times. Default value is unprogrammed (“1”).
1
2
3
1
2
3
4
1
2
3
4
Memory Lock bits
1. Program the Fuse bits before programming the Lock bits.
BLB02
BLB12
LB1
1
0
0
1
1
0
0
1
1
0
0
BLB01
BLB11
LB2
1
1
0
1
0
0
1
1
0
0
1
Protection Type
No memory lock features enabled
Further programming of the Flash and EEPROM is
disabled in parallel and Serial Programming modes. The
Fuse bits are locked in both Serial and Parallel
Programming modes.
Further programming and verification of the Flash and
EEPROM is disabled in parallel and Serial Programming
modes. The Fuse bits are locked in both Serial and
Parallel Programming modes.
No restrictions for SPM, LPM accessing the Application
Code section
SPM is not allowed to write to the Application Code
section.
SPM is not allowed to write to the Application Code
section and LPM executing from Boot Loader section is
not allowed to read from the Application Code section.
LPM executing from the Boot Loader section is not
allowed to read from the Application Code section.
No restrictions for SPM, LPM accessing the Boot Loader
section
SPM is not allowed to write the Boot Loader section.
SPM is not allowed to write to the Boot Loader section and
LPM executing from the Application Code section is not
allowed to read from the Boot Loader section.
LPM executing from the Application Code section is not
allowed to read from the Boot Loader section.
(1)
(1)
(1)
1228D–AVR–02/07
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