PIC16C925/CL Microchip Technology, PIC16C925/CL Datasheet - Page 103

• Manufacturer Part Number: PIC16C925/CL
• Description: IC MCU EPROM 4KX14 LCDDVR 68CLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C925/CL

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: EPROM
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-CLCC Window, 68-CERQUAD
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA16XL680 - ADAPTER DEVICE FOR MPLAB-ICEAC164024 - ADAPTER PICSTART PLUS 68PLCCAC164022 - MODULE SKT PROMATEII 68PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.3
The PIC16C9XX differentiates between various kinds
of RESET:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR)
Some registers are not affected in any RESET condi-
tion; their status is unknown on POR and unchanged in
any other RESET. Most other registers are reset to a
“RESET state” on Power-on Reset (POR), on the
MCLR and WDT Reset, and on MCLR Reset during
FIGURE 12-6:
2001 Microchip Technology Inc.
MCLR
OSC1
Note 1:
V
DD
2:
RESET
This is a separate oscillator from the RC oscillator of the CLKIN pin.
See Table 12-3 for various time-out situations.
RC OSC
On-chip
OST/PWRT
Brown-out
V
(1)
Module
Detect
DD
WDT
Reset
Rise
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
OST
PWRT
WDT
Time-out
Reset
Power-on
Reset
10-bit Ripple Counter
10-bit Ripple Counter
BOREN
External
SLEEP
Reset
Preliminary
SLEEP. They are not affected by a WDT Wake-up,
which is viewed as the resumption of normal operation.
The TO and PD bits are set or cleared differently in dif-
ferent RESET situations, as indicated in Table 12-4.
These bits are used in software to determine the nature
of the RESET. See Table 12-6 for a full description of
RESET states of all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-6.
The devices all have a MCLR noise filter in the MCLR
Reset path. The filter will detect and ignore small
pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
Enable PWRT
Enable OST
(2)
(2)
PIC16C925/926
S
R
DS39544A-page 101
Q
Chip_Reset