PIC16C925/CL Microchip Technology, PIC16C925/CL Datasheet - Page 125

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PIC16C925/CL

Manufacturer Part Number
PIC16C925/CL
Description
IC MCU EPROM 4KX14 LCDDVR 68CLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C925/CL

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
EPROM
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-CLCC Window, 68-CERQUAD
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA16XL680 - ADAPTER DEVICE FOR MPLAB-ICEAC164024 - ADAPTER PICSTART PLUS 68PLCCAC164022 - MODULE SKT PROMATEII 68PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2001 Microchip Technology Inc.
If Skip: (2nd Cycle)
Before Instruction:
After Instruction:
PC
CNT
if CNT
PC
if CNT
PC
=
=
=
=
=
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
None
The contents of register ’f’ are incre-
mented. If ’d’ is 0, the result is placed
in the W register. If ’d’ is 1, the result is
placed back in register ’f’.
If the result is 1, the next instruction is
executed. If the result is 0, a NOP is
executed instead, making it a 2T
instruction.
1
1(2)
HERE
CONTINUE •
skip if result = 0
Operation
Decode
Q1
Q1
address HERE
CNT + 1
0,
address CONTINUE
0,
address HERE +1
00
f
No
[0,1]
127
(destination),
INCFSZ f [,d]
register ’f’
Operation
INCFSZ CNT,
GOTO
1111
Read
Q2
Q2
No
LOOP
Operation
Process
dfff
data
Q3
Q3
No
1
destination
Operation
Write to
ffff
Preliminary
Q4
Q4
No
CY
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
Before Instruction:
After Instruction:
W
W
Z
=
=
=
PIC16C925/926
0x9A
0xBF
0
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
The contents of the W register is
OR’ed with the eight-bit literal 'k'.
The result is placed in the W
register.
1
1
IORLW
Decode
Q1
11
k
255
0x35
IORLW k
literal ’k’
1000
Read
Q2
(W)
DS39544A-page 123
Process
kkkk
data
Q3
Write to
kkkk
Q4
W

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