PIC16C925/CL Microchip Technology, PIC16C925/CL Datasheet - Page 111

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PIC16C925/CL

Manufacturer Part Number
PIC16C925/CL
Description
IC MCU EPROM 4KX14 LCDDVR 68CLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C925/CL

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
EPROM
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-CLCC Window, 68-CERQUAD
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA16XL680 - ADAPTER DEVICE FOR MPLAB-ICEAC164024 - ADAPTER PICSTART PLUS 68PLCCAC164022 - MODULE SKT PROMATEII 68PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
12.6
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt, i.e., the W and STATUS reg-
isters. This will have to be implemented in software.
Example 12-1 stores and restores the STATUS, W, and
PCLATH registers. The register, W_TEMP, must be
defined in each bank and must be defined at the same
offset from the bank base address (i.e., if W_TEMP is
defined at 0x20 in bank 0, it must also be defined at
0xA0 in bank 1).
EXAMPLE 12-1:
2001 Microchip Technology Inc.
MOVWF
SWAPF
CLRF
MOVWF
MOVF
MOVWF
CLRF
BCF
MOVF
MOVWF
MOVF
MOVWF
SWAPF
MOVWF
SWAPF
SWAPF
Context Saving During Interrupts
:
:(ISR)
:
W_TEMP
STATUS,W
STATUS
STATUS_TEMP
PCLATH, W
PCLATH_TEMP
PCLATH
STATUS, IRP
FSR, W
FSR_TEMP
PCLATH_TEMP, W
PCLATH
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
SAVING STATUS, W, AND PCLATH REGISTERS IN RAM
;Copy W to TEMP register, could be bank one or zero
;Swap status to be saved into W
;bank 0, regardless of current bank, Clears IRP,RP1,RP0
;Save status to bank zero STATUS_TEMP register
;Only required if using pages 1, 2 and/or 3
;Save PCLATH into W
;Page zero, regardless of current page
;Return to Bank 0
;Copy FSR to W
;Copy FSR from W to FSR_TEMP
;Insert user code here
;Restore PCLATH
;Move W into PCLATH
;Swap STATUS_TEMP register into W
;(sets bank to original state)
;Move W into STATUS register
;Swap W_TEMP
;Swap W_TEMP into W
Preliminary
The code in the example:
e)
f)
g)
h)
i)
j)
Stores the W register.
Stores the STATUS register in bank 0.
Stores the PCLATH register.
Executes the ISR code.
Restores the STATUS register (and bank select
bit).
Restores the W and PCLATH registers.
PIC16C925/926
DS39544A-page 109

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