ATMEGA8515-16AC Atmel, ATMEGA8515-16AC Datasheet - Page 96
ATMEGA8515-16AC
Manufacturer Part Number
ATMEGA8515-16AC
Description
IC AVR MCU 8K 16MHZ COM 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515-16AC
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8515-16AC
Manufacturer:
MOT
Quantity:
3 450
Part Number:
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Manufacturer:
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Special Function IO Register –
SFIOR
96
ATmega8515(L)
the edge detector uses sampling, the maximum frequency of an external clock it can
detect is half the sampling frequency (Nyquist sampling theorem). However, due to vari-
ation of the system clock frequency and duty cycle caused by Oscillator source (crystal,
resonator, and capacitors) tolerances, it is recommended that maximum frequency of an
external clock source is less than f
An external clock source can not be prescaled.
Figure 46. Prescaler for Timer/Counter0 and Timer/Counter1
Note:
• Bit 0 – PSR10: Prescaler Reset Timer/Counter1 and Timer/Counter0
When this bit is written to one, the Timer/Counter1 and Timer/Counter0 prescaler will be
reset. The bit will be cleared by hardware after the operation is performed. Writing a
zero to this bit will have no effect. Note that Timer/Counter1 and Timer/Counter0 share
the same prescaler and a reset of this prescaler will affect both timers. This bit will
always be read as zero.
PSR10
Bit
Read/Write
Initial Value
clk
T0
T1
I/O
Synchronization
Synchronization
1. The synchronization logic on the input pins (
R/W
7
–
0
XMBK
R/W
6
0
XMM2
R/W
5
0
clk_I/O
clk
Clear
T1
/2.5.
XMM1
R/W
4
0
XMM0
R/W
3
0
T1/T0)
PUD
R/W
is shown in Figure 45.
2
0
(1)
R/W
1
–
0
clk
PSR10
R/W
T0
2512K–AVR–01/10
0
0
SFIOR
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