ATMEGA8515-16AI Atmel, ATMEGA8515-16AI Datasheet - Page 81
![IC AVR MCU 8K 16MHZ IND 44-TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA8515-16AI
Manufacturer Part Number
ATMEGA8515-16AI
Description
IC AVR MCU 8K 16MHZ IND 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515-16AI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8515-16AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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Definitions
Timer/Counter Clock
Sources
Counter Unit
2512K–AVR–01/10
inactive when no clock source is selected. The output from the clock select logic is
referred to as the timer clock (clk
The double buffered Output Compare Register (OCR0) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the Wave-
form Generator to generate a PWM or variable frequency output on the Output Compare
Pin (OC0). See “Output Compare Unit” on page 82. for details. The Compare Match
event will also set the Compare Flag (OCF0) which can be used to generate an output
compare interrupt request.
Many register and bit references in this document are written in general form. A lower
case “n” replaces the Timer/Counter number, in this case 0. However, when using the
register or bit defines in a program, the precise form must be used, i.e., TCNT0 for
accessing Timer/Counter0 counter value and so on.
The definitions in Table 43 are also used extensively throughout the document.
Table 43. Definitions
The Timer/Counter can be clocked by an internal or an external clock source. The clock
source is selected by the clock select logic which is controlled by the Clock Select
(CS02:0) bits located in the Timer/Counter Control Register (TCCR0). For details on
clock sources and prescaler, see “Timer/Counter0 and Timer/Counter1 Prescalers” on
page 95.
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
Figure 35 shows a block diagram of the counter and its surroundings.
Figure 35. Counter Unit Block Diagram
Signal description (internal signals):
BOTTOM
MAX
TOP
count
direction
clear
DATA BUS
TCNTn
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR0 Register. The
assignment is dependent on the mode of operation.
Increment or decrement TCNT0 by 1.
Select between increment and decrement.
Clear TCNT0 (set all bits to zero).
direction
count
clear
bottom
T0
).
Control Logic
top
TOVn
(Int.Req.)
clk
Tn
ATmega8515(L)
Clock Select
( From Prescaler )
Detector
Edge
Tn
81
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