ATMEGA162L-8AI Atmel, ATMEGA162L-8AI Datasheet - Page 111

IC MCU AVR 16K 3V 8MHZ 44-TQFP

ATMEGA162L-8AI

Manufacturer Part Number
ATMEGA162L-8AI
Description
IC MCU AVR 16K 3V 8MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162L-8AI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Input Capture Unit
2513C–AVR–09/02
how waveforms are generated on the Output Compare outputs OCnx. For more details
about advanced counting sequences and waveform generation, see “Modes of Opera-
tion” on page 116.
The Timer/Counter Overflow Flag (TOVn) is set according to the mode of operation
selected by the WGMn3:0 bits. TOVn can be used for generating a CPU interrupt.
The Timer/Counter incorporates an input capture unit that can capture external events
and give them a time-stamp indicating time of occurrence. The external signal indicating
an event, or multiple events, can be applied via the ICPn pin or alternatively, via the
Analog Comparator unit. The time-stamps can then be used to calculate frequency,
duty-cycle, and other features of the signal applied. Alternatively the time-stamps can be
used for creating a log of the events.
The input capture unit is illustrated by the block diagram shown in Figure 48. The ele-
ments of the block diagram that are not directly a part of the input capture unit are gray
shaded. The small “n” in register and bit names indicates the Timer/Counter number.
Figure 48. Input Capture Unit Block Diagram
Note:
When a change of the logic level (an event) occurs on the Input Capture pin (ICPn),
alternatively on the Analog Comparator output (ACO), and this change confirms to the
setting of the edge detector, a capture will be triggered. When a capture is triggered, the
16-bit value of the counter (TCNTn) is written to the Input Capture Register (ICRn). The
Input Capture Flag (ICFn) is set at the same system clock as the TCNTn value is copied
into ICRn Register. If enabled (TICIEn = 1), the input capture flag generates an input
capture interrupt. The ICFn flag is automatically cleared when the interrupt is executed.
Alternatively the ICFn flag can be cleared by software by writing a logical one to its I/O
bit location.
ICPn
WRITE
1. The Analog Comparator Output (ACO) can only trigger the Timer/Counter1 ICP – not
Timer/Counter3.
ICRnH (8-bit)
TEMP (8-bit)
Comparator
Analog
ICRn (16-bit Register)
ACO*
ICRnL (8-bit)
ACIC*
DATA BUS
Canceler
Noise
ICNC
(1)
(8-bit)
TCNTnH (8-bit)
ATmega162(V/U/L)
TCNTn (16-bit Counter)
Detector
ICES
Edge
TCNTnL (8-bit)
ICFn (Int.Req.)
111

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