ATMEGA162L-8AI Atmel, ATMEGA162L-8AI Datasheet - Page 89

• Manufacturer Part Number: ATMEGA162L-8AI
• Description: IC MCU AVR 16K 3V 8MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162L-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Counter Unit
Output Compare Unit
2513C–AVR–09/02
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
Figure 34 shows a block diagram of the counter and its surroundings.
Figure 34. Counter Unit Block Diagram
Signal description (internal signals):
Depending of the mode of operation used, the counter is cleared, incremented, or dec-
remented at each timer clock (clk
clock source, selected by the clock select bits (CS02:0). When no clock source is
selected (CS02:0 = 0) the timer is stopped. However, the TCNT0 value can be accessed
by the CPU, regardless of whether clk
priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM01 and WGM00 bits
located in the Timer/Counter Control Register (TCCR0). There are close connections
between how the counter behaves (counts) and how waveforms are generated on the
output Compare Output OC0. For more details about advanced counting sequences
and waveform generation, see “Modes of Operation” on page 92.
The Timer/Counter overflow (TOV0) flag is set according to the mode of operation
selected by the WGM01:0 bits. TOV0 can be used for generating a CPU interrupt.
The 8-bit comparator continuously compares TCNT0 with the Output Compare Register
(OCR0). Whenever TCNT0 equals OCR0, the comparator signals a match. A match will
set the Output Compare Flag (OCF0) at the next timer clock cycle. If enabled (OCIE0 =
1 and Global Interrupt Flag in SREG is set), the Output Compare Flag generates an out-
put compare interrupt. The OCF0 flag is automatically cleared when the interrupt is
executed. Alternatively, the OCF0 flag can be cleared by software by writing a logical
one to its I/O bit location. The waveform generator uses the match signal to generate an
output according to operating mode set by the WGM01:0 bits and Compare Output
mode (COM01:0) bits. The max and bottom signals are used by the waveform generator
for handling the special cases of the extreme values in some modes of operation (See
“Modes of Operation” on page 92.).
count
direction
clear
clk
top
bottom
Tn
DATA BUS
TCNTn
Increment or decrement TCNT0 by 1.
Select between increment and decrement.
Clear TCNT0 (set all bits to zero).
Timer/Counter clock, referred to as clk
Signalize that TCNT0 has reached maximum value.
Signalize that TCNT0 has reached minimum value (zero).
direction
count
clear
bottom
T
0). clk
Control Logic
T
0 is present or not. A CPU write overrides (has
T
0 can be generated from an external or internal
top
TOVn
(Int.Req.)
clk
Tn
ATmega162(V/U/L)
T0
in the following.
Clock Select
( From Prescaler )
Detector
Edge
Tn
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