PIC18F4539T-E/ML Microchip Technology, PIC18F4539T-E/ML Datasheet - Page 113

• Manufacturer Part Number: PIC18F4539T-E/ML
• Description: IC PIC MCU FLASH 12KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4539T-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.2
The TMR3 Register pair (TMR3H:TMR3L) increments
from 0000h to FFFFh and rolls over to 0000h. The
TMR3 Interrupt, if enabled, is generated on overflow,
which is latched in interrupt flag bit, TMR3IF
TABLE 13-1:
 2002 Microchip Technology Inc.
INTCON
PIR2
PIE2
IPR2
TMR3L
TMR3H
T1CON
T3CON
Legend:
Name
Timer3 Interrupt
x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Timer1 module.
Holding Register for the Least Significant Byte of the 16-bit TMR3 Register
Holding Register for the Most Significant Byte of the 16-bit TMR3 Register
GIE/GIEH PEIE/GIEL TMR0IE
RD16
RD16
Bit 7
—
—
—
REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
Bit 6
—
—
—
—
—
T1CKPS1 T1CKPS0
T3CKPS1 T3CKPS0
Bit 5
—
—
—
INT0IE
EEIF
EEIE
EEIP
Bit 4
Preliminary
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
—
—
(PIR2<1>). This interrupt can be enabled/disabled by
setting/clearing TMR3 interrupt enable bit, TMR3IE
(PIE2<1>).
T1SYNC TMR1CS TMR1ON 0-00 0000 u-uu uuuu
T3SYNC TMR3CS TMR3ON 0000 0000 uuuu uuuu
TMR0IF
LVDIE
LVDIP
LVDIF
Bit 2
TMR3IE
TMR3IP
TMR3IF
INT0IF
Bit 1
PIC18FXX39
RBIF
Bit 0
—
—
—
0000 000x 0000 000u
---0 0000 ---0 0000
---0 0000 ---0 0000
---1 1111 ---1 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
POR, BOR
Value on
DS30485A-page 111
All Other
Value on
RESETS