ATMEGA64-16MJ Atmel, ATMEGA64-16MJ Datasheet - Page 93

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ATMEGA64-16MJ

Manufacturer Part Number
ATMEGA64-16MJ
Description
IC MCU AVR 64K 5V 16MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64-16MJ

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8-bit
Timer/Counter0
with PWM and
Asynchronous
Operation
Overview
Registers
2490Q–AVR–06/10
Timer/Counter0 is a general purpose, single-channel, 8-bit Timer/Counter module. The main
features are:
A simplified block diagram of the 8-bit Timer/Counter is shown in
ment of I/O pins, refer to
I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are
listed in the
Figure 34. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interrupt
request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR).
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and
TIMSK are not shown in the figure since these registers are shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or asynchronously clocked from
the TOSC1/2 pins, as detailed later in this section. The asynchronous operation is controlled by
the Asynchronous Status Register (ASSR). The Clock Select logic block controls which clock
source the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inac-
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)
Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
“8-bit Timer/Counter Register Description” on page
Status Flags
Timer/Counter
TCNTn
OCRn
=
“Pin Configuration” on page
ASSRn
direction
count
clear
BOTTOM
Synchronized Status Flags
= 0
Control Logic
=
TCCRn
TOP
Asynchronous Mode
0xFF
Select (ASn)
clk
2. CPU accessible I/O Registers, including
Tn
Synchronization Unit
OCn
(Int. Req.)
Generation
Prescaler
Waveform
104.
Figure
ATmega64(L)
34. For the actual place-
Oscillator
T/C
clk
TOVn
(Int. Req.)
clk
clk
OCn
ASY
I/O
I/O
TOSC2
TOSC1
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