ATAM893T-TKS Atmel, ATAM893T-TKS Datasheet - Page 3

• Manufacturer Part Number: ATAM893T-TKS
• Description: IC MON TIRE-PRESS ATARX9X SER
• Manufacturer: Atmel
• Series: MARC4r

Specifications of ATAM893T-TKS

• Core Processor: MARC4
• Core Size: 4-Bit
• Speed: 4MHz
• Connectivity: SSI (2-Wire, 3 Wire)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Eeprom Size: 64 x 16
• Ram Size: 256 x 4
• Voltage - Supply (vcc/vdd): 1.8 V ~ 6.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (5.3mm Width), 20-SO, 20-SOEIAJ
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

2. Introduction
3. Differences Between ATAM893-D and ATARx90/x92
3.1
3.2
3.3
3.4
4680C–4BMCU–01/05
Program Memory
Configuration Memory
Data Memory
Reset Function
The ATAM893-D is a member of Atmel’s family of 4-bit single-chip microcontrollers. Instead of
ROM it contains EEPROM, RAM, parallel I/O ports, two 8-bit programmable multifunction
timer/counters, voltage supervisor, interval timer with watchdog function and a sophisticated on-
chip clock generation with integrated RC-, 32-kHz and 4-MHz crystal oscillators.
The program memory of the MTP device is realized as an EEPROM. The memory size for user
programs is 4096 bytes. It is programmed as 258
LOCK bit function is user selectable and protects the device from unauthorized read out of the
program memory.
An additional area of 32 bytes of the EEPROM is used to store information about the hardware
configuration. All the options that are selectable for the ROM versions are available to the user.
This includes not only the different port options but also the possibilities to select different capac-
itors for OSC1 and OSC2, the option to enable or disable the hardlock for the watchdog, the
option to select OSC2 instead of OSC1 as external clock input and the option to enable the
external clock monitor as a reset source. Activating the options is performed by the reset cir-
cuitry. Reset starts a download sequence to transfer the information from the memory into a shift
register (configuration register).
The ATAM893-D contains an internal data EEPROM that is organized as two pages of
32
with the flash part. Also for compatibility reasons the access to the EEPROM is handled via the
MCL (serial interface) as in the corresponding ROM parts. A behavioral difference that only
needs to be considered for error handling can be seen, when the communication via the MCL is
not terminated correctly. A missing STOP condition leads to a significantly higher current con-
sumption for the ROM parts compared to the flash parts. A slightly different concept for the read
amplifiers of the memory makes the flash part more tolerant in terms of communication errors.
During each reset (power-on or brown-out) the configuration register is reset and reloaded with
the data from the configuration memory. This leads to a slightly different behavior compared to
the ROM versions. Both devices switch their I/Os to input during reset but the ROM part has the
mask selected pull-up or pull-down resistors active while the MTP has them removed until the
download is finished.
16 bit. If it is necessary to be compatible with the ROM parts, only one page must be used
16-byte blocks of data. The implemented
ATAM893-D
3