ATAM893T-TKS Atmel, ATAM893T-TKS Datasheet - Page 88
ATAM893T-TKS
Manufacturer Part Number
ATAM893T-TKS
Description
IC MON TIRE-PRESS ATARX9X SER
Manufacturer
Atmel
Series
MARC4r
Datasheet
1.ATAM893T-TKS.pdf
(98 pages)
Specifications of ATAM893T-TKS
Core Processor
MARC4
Core Size
4-Bit
Speed
4MHz
Connectivity
SSI (2-Wire, 3 Wire)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Eeprom Size
64 x 16
Ram Size
256 x 4
Voltage - Supply (vcc/vdd)
1.8 V ~ 6.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SOIC (5.3mm Width), 20-SO, 20-SOEIAJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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6.2.3.1
6.2.3.2
6.2.3.3
6.2.3.4
6.2.3.5
88
ATAM893-D
Read One Data Byte
Read Two Data Bytes
Read n Data Bytes
Read Control Bytes
Initializing the Serial Interface to the EEPROM
A
To prevent unexpected behavior of the EEPROM and its interface it is good practice to use an
initialization sequence after any reset of the circuit. This is performed by writing:
to the serial interface. If the EEPROM acknowledges this sequence it is in a defined state. It may
be necessary to perform this sequence twice.
Start
Read low byte first,
address increment
Byte order
Read high byte first,
address decrement
Byte order
Start
Start
Start
acknowledge, N
Control byte
“FFh”
Control byte
Control byte
A
HB(R)
LB(R)
A
no acknowledge; HB: high byte; LB: low byte, R: row address
A
A
Data byte 1
Data byte 1
Data byte 1
HB(R)
LB(R)
A4
A4
MSB
MSB
N Stop
LB(R+1)
HB(R-1)
A
N
A
A3
A3
Data byte 2
Data byte 2
Stop
Row address
Row address
A2
A2
HB(R+1)
LB(R-1)
A - - -
A1
A1
N
Stop
A0
A0
- - -
- - -
Data byte n
C1
C1
0
1
LB(R+n)
HB(R-n)
N Stop
4680C–4BMCU–01/05
C0
C0
1
0
HB(R+n)
LB(R-n)
R/NW
R/NW
LSB
LSB
1
1
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