ATMEGA165-16AI Atmel, ATMEGA165-16AI Datasheet - Page 34

• Manufacturer Part Number: ATMEGA165-16AI
• Description: IC AVR MCU 16K 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Standby Mode
Table 15. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Notes:
Power Reduction
Register
Power Reduction Register -
PRR
2573G–AVR–07/09
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
Power-save
Standby
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is not running in asynchronous mode.
3. For INT0, only level interrupt.
(1)
clk
CPU
Active Clock Domains
clk
FLASH
clk
X
IO
Oscillator is stopped during sleep. If the Timer/Counter2 is using the synchronous clock,
the clock source is stopped during sleep. Note that even if the synchronous clock is run-
ning in Power-save, this clock is only available for the Timer/Counter2.
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in six clock cycles.
The Power Reduction Register, PRR, provides a method to stop the clock to individual
peripherals to reduce power consumption. The current state of the peripheral is frozen
and the I/O registers can not be read or written. Resources used by the peripheral when
stopping the clock will remain occupied, hence the peripheral should in most cases be
disabled before stopping the clock. Waking up a module, which is done by clearing the
bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the
overall power consumption. See “Supply Current of I/O modules” on page 290 for exam-
ples. In all other sleep modes, the clock is already stopped.
• Bit 7..4 - Res: Reserved bits
These bits are reserved in ATmega165 and will always read as zero.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the
Timer/Counter1 is enabled, operation will continue like before the shutdown.
Bit
Read/Write
Initial Value
clk
X
X
ADC
clk
X
X
X
ASY
R
7
–
0
Main Clock
Enabled
Source
X
X
X
Oscillators
R
6
–
0
Enabled
Timer
Osc
X
X
X
R
5
–
0
(2)
(2)
and Pin
Change
INT0
R
4
–
0
X
X
X
X
X
(3)
(3)
(3)
(3)
PRTIM1
R/W
Condition
USI Start
3
0
X
X
X
X
X
PRSPI
Wake-up Sources
R/W
2
0
Timer2
X
X
X
(2)
ATmega165/V
PRUSART0
R/W
1
0
EEPROM
Ready
SPM/
X
X
PRADC
R/W
0
0
ADC
X
X
PRR
Other
I/O
X
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