ATMEGA2561-16AI Atmel, ATMEGA2561-16AI Datasheet - Page 223
ATMEGA2561-16AI
Manufacturer Part Number
ATMEGA2561-16AI
Description
IC AVR MCU 256K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA2561-16AI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 223 of 444
- Download datasheet (10Mb)
21.9.2
2549M–AVR–09/10
UCSRnA – USART Control and Status Register A
The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers share the
same I/O address referred to as USART Data Register or UDRn. The Transmit Data Buffer Reg-
ister (TXB) will be the destination for data written to the UDRn Register location. Reading the
UDRn Register location will return the contents of the Receive Data Buffer Register (RXB).
For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to
zero by the Receiver.
The transmit buffer can only be written when the UDREn Flag in the UCSRnA Register is set.
Data written to UDRn when the UDREn Flag is not set, will be ignored by the USART Transmit-
ter. When data is written to the transmit buffer, and the Transmitter is enabled, the Transmitter
will load the data into the Transmit Shift Register when the Shift Register is empty. Then the
data will be serially transmitted on the TxDn pin.
The receive buffer consists of a two level FIFO. The FIFO will change its state whenever the
receive buffer is accessed. Due to this behavior of the receive buffer, do not use Read-Modify-
Write instructions (SBI and CBI) on this location. Be careful when using bit test instructions
(SBIC and SBIS), since these also will change the state of the FIFO.
• Bit 7 – RXCn: USART Receive Complete
This flag bit is set when there are unread data in the receive buffer and cleared when the receive
buffer is empty (that is, does not contain any unread data). If the Receiver is disabled, the
receive buffer will be flushed and consequently the RXCn bit will become zero. The RXCn Flag
can be used to generate a Receive Complete interrupt (see description of the RXCIEn bit).
• Bit 6 – TXCn: USART Transmit Complete
This flag bit is set when the entire frame in the Transmit Shift Register has been shifted out and
there are no new data currently present in the transmit buffer (UDRn). The TXCn Flag bit is auto-
matically cleared when a transmit complete interrupt is executed, or it can be cleared by writing
a one to its bit location. The TXCn Flag can generate a Transmit Complete interrupt (see
description of the TXCIEn bit).
• Bit 5 – UDREn: USART Data Register Empty
The UDREn Flag indicates if the transmit buffer (UDRn) is ready to receive new data. If UDREn
is one, the buffer is empty, and therefore ready to be written. The UDREn Flag can generate a
Data Register Empty interrupt (see description of the UDRIEn bit).
UDREn is set after a reset to indicate that the Transmitter is ready.
• Bit 4 – FEn: Frame Error
This bit is set if the next character in the receive buffer had a Frame Error when received, that is,
when the first stop bit of the next character in the receive buffer is zero. This bit is valid until the
receive buffer (UDRn) is read. The FEn bit is zero when the stop bit of received data is one.
Always set this bit to zero when writing to UCSRnA.
Bit
Read/Write
Initial Value
RXCn
R
7
0
TXCn
R/W
6
0
ATmega640/1280/1281/2560/2561
UDREn
R
5
1
FEn
R
4
0
DORn
R
3
0
UPEn
R
2
0
U2Xn
R/W
1
0
MPCMn
R/W
0
0
UCSRnA
223
Related parts for ATMEGA2561-16AI
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
BUNDLE ATMEGA644P/AT86RF230 QFN
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
BUNDLE ATMEGA644P/AT86RF230 TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU ATMEGA1281/AT86RF230 64-TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU ATMEGA1280/AT86RF230 100TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
BUNDLE ATMEGA1280/AT86RF100-TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
BUNDLE ATMEGA2560V/AT86RF230-ZU
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU ATMEGA2561/AT86RF230 64-TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet: