DSPIC30F4013T-20I/PT Microchip Technology, DSPIC30F4013T-20I/PT Datasheet - Page 27

• Manufacturer Part Number: DSPIC30F4013T-20I/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013T-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• For Use With: AC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: DSPIC30F4013T20IP

3.1.1
This architecture fetches 24-bit wide program memory.
Consequently,
However, as the architecture is modified Harvard, data
can also be present in program space.
There are two methods by which program space can
be accessed: via special table instructions, or through
the remapping of a 16K word program space page into
the upper half of data space (see Section 3.1.2). The
TBLRDL and TBLWTL instructions offer a direct method
of reading or writing the LS Word of any address within
program space, without going through data space. The
TBLRDH and TBLWTH instructions are the only method
whereby the upper 8 bits of a program space word can
be accessed as data.
The PC is incremented by two for each successive
24-bit program word. This allows program memory
addresses to directly map to data space addresses.
Program memory can thus be regarded as two 16-bit
word wide address spaces, residing side by side, each
with the same address range. TBLRDL and TBLWTL
access the space which contains the LS Data Word,
and TBLRDH and TBLWTH access the space which
contains the MS Data Byte.
Figure 3-3 shows how the EA is created for table oper-
ations and data space accesses (PSV = 1). Here,
P<23:0> refers to a program space word, whereas
D<15:0> refers to a data space word.
FIGURE 3-4:
 2004 Microchip Technology Inc.
Program Memory
‘Phantom’ Byte
(read as ‘0’)
DATA ACCESS FROM PROGRAM
MEMORY USING TABLE
INSTRUCTIONS
PC Address
0x000000
0x000002
0x000004
0x000006
instructions
PROGRAM DATA TABLE ACCESS (LS WORD)
are
00000000
00000000
00000000
00000000
always
Advance Information
23
aligned.
TBLRDL.W
16
A set of table instructions are provided to move byte or
word sized data to and from program space.
1.
2.
3.
4.
dsPIC30F3014/4013
TBLRDL: Table Read Low
Word: Read the LS Word of the program address;
P<15:0> maps to D<15:0>.
Byte: Read one of the LS Bytes of the program
address;
P<7:0> maps to the destination byte when byte
select = 0;
P<15:8> maps to the destination byte when byte
select = 1.
TBLWTL: Table Write Low (refer to Section 5.0
for details on Flash Programming)
TBLRDH: Table Read High
Word: Read the MS Word of the program address;
P<23:16> maps to D<7:0>; D<15:8> will always
be = 0.
Byte: Read one of the MS Bytes of the program
address;
P<23:16> maps to the destination byte when
byte select = 0;
The destination byte will always be = 0 when
byte select = 1.
TBLWTH: Table Write High (refer to Section 5.0
for details on Flash Programming)
TBLRDL.B (Wn<0> = 1)
8
TBLRDL.B (Wn<0> = 0)
0
DS70138C-page 25