ATMEGA324P-15MZ Atmel, ATMEGA324P-15MZ Datasheet - Page 69
ATMEGA324P-15MZ
Manufacturer Part Number
ATMEGA324P-15MZ
Description
MCU AVR 32K FLASH 15MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA324P-15MZ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.2.6
11.2.7
11.2.8
7674F–AVR–09/09
PCMSK3 – Pin Change Mask Register 3
PCMSK2 – Pin Change Mask Register 2
PCMSK1 – Pin Change Mask Register 1
• Bit 1 – PCIF1: Pin Change Interrupt Flag 1
When a logic change on any PCINT15..8 pin triggers an interrupt request, PCIF1 becomes set
(one). If the I-bit in SREG and the PCIE1 bit in EIMSK are set (one), the MCU will jump to the
corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alter-
natively, the flag can be cleared by writing a logical one to it.
• Bit 0 – PCIF0: Pin Change Interrupt Flag 0
When a logic change on any PCINT7..0 pin triggers an interrupt request, PCIF0 becomes set
(one). If the I-bit in SREG and the PCIE0 bit in EIMSK are set (one), the MCU will jump to the
corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alter-
natively, the flag can be cleared by writing a logical one to it.
• Bit 7:0 – PCINT31:24: Pin Change Enable Mask 31:24
Each PCINT31:24-bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT31:24 is set and the PCIE2 bit in PCICR is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT31..24 is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
• Bit 7:0 – PCINT23:16: Pin Change Enable Mask 23..16
Each PCINT23:16-bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT23:16 is set and the PCIE2 bit in PCICR is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT23..16 is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
• Bit 7:0 – PCINT15:8: Pin Change Enable Mask 15..8
Each PCINT15:8-bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT15:8 is set and the PCIE1 bit in EIMSK is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT15:8 is cleared, pin change interrupt on the corresponding I/O
pin is disabled.
Bit
(0x73)
Read/Write
Initial Value
Bit
(0x6D)
Read/Write
Initial Value
Bit
(0x6C)
Read/Write
Initial Value
PCINT31
PCINT23
PCINT15
R/W
R/W
R/W
7
0
7
0
7
0
PCINT30
PCINT22
PCINT14
R/W
R/W
R/W
6
0
6
0
6
0
PCINT29
PCINT21
PCINT13
R/W
R/W
R/W
5
0
5
0
5
0
PCINT28
PCINT20
PCINT12
R/W
R/W
R/W
4
0
4
0
4
0
ATmega164P/324P/644P
PCINT27
PCINT19
PCINT11
R/W
R/W
R/W
3
0
3
0
3
0
PCINT26
PCINT18
PCINT10
R/W
R/W
R/W
2
0
2
0
2
0
PCINT25
PCINT17
PCINT9
R/W
R/W
R/W
1
0
1
0
1
0
PCINT24
PCINT16
PCINT8
R/W
R/W
R/W
0
0
0
0
0
0
PCMSK2
PCMSK2
PCMSK1
69
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