P89C664HBA/00,512 NXP Semiconductors, P89C664HBA/00,512 Datasheet - Page 7
![IC 80C51 MCU FLASH 64K 44-PLCC](/photos/6/98/69845/568-44-plcc_sot187-2_sml.jpg)
P89C664HBA/00,512
Manufacturer Part Number
P89C664HBA/00,512
Description
IC 80C51 MCU FLASH 64K 44-PLCC
Manufacturer
NXP Semiconductors
Series
89Cr
Datasheet
1.P89C660HBA00512.pdf
(89 pages)
Specifications of P89C664HBA/00,512
Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
568-1271-5
935267448512
P89C664HBA
935267448512
P89C664HBA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P89C664HBA/00,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
PIN DESCRIPTIONS
2002 Oct 28
V
V
P0.0–0.7
P1.0–P1.7
P2.0–P2.7
P3.0–P3.7
RST
ALE
PSEN
MNEMONIC
MNEMONIC
SS
CC
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
PLCC
43–36
24–31
13–19
2–9
PIN NUMBER
11,
22
44
11
13
14
15
16
17
18
19
10
33
32
2
3
4
5
6
7
8
9
5, 7–13
40–44,
37–30
18–25
LQFP
1–3
16
38
40
41
42
43
44
10
11
12
13
27
26
1
2
3
5
7
8
9
4
TYPE
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
Ground: 0 V reference.
Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them
float and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order
address and data bus during accesses to external program and data memory. In this
application, it uses strong internal pull-ups when emitting 1s.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups on all pins except P1.6 and
P1.7 which are open drain. Port 1 pins that have 1s written to them are pulled high by the
internal pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled low
will source current because of the internal pull-ups. (See DC Electrical Characteristics: I
Alternate functions for P89C660/662/664/668 Port 1 include:
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: I
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pull-ups
when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOV
@Ri), port 2 emits the contents of the P2 special function register.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 3 pins that are externally being pulled low will source current because of the pull-ups. (See
DC Electrical Characteristics: I
P89C660/662/664/668, as listed below:
Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal resistor to V
V
Address Latch Enable: Output pulse for latching the low byte of the address during an access
to external memory. In normal operation, ALE is emitted twice every machine cycle, and can be
used for external timing or clocking. Note that one ALE pulse is skipped during each access to
external data memory. ALE can be disabled by setting SFR auxiliary.0. With this bit set, ALE
will be active only during a MOVX instruction.
Program Store Enable: The read strobe to external program memory. When executing code
from the external program memory, PSEN is activated twice each machine cycle, except that
two PSEN activations are skipped during each access to external data memory. PSEN is not
activated during fetches from internal program memory.
CC
T2 (P1.0): Timer/Counter 2 external count input/Clockout (see Programmable Clock-Out)
T2EX (P1.1): Timer/Counter 2 Reload/Capture/Direction Control
ECI (P1.2): External Clock Input to the PCA
CEX0 (P1.3): Capture/Compare External I/O for PCA module 0
CEX1 (P1.4): Capture/Compare External I/O for PCA module 1
CEX2 (P1.5): Capture/Compare External I/O for PCA module 2
SCL (P1.6): I
SDA (P1.7): I
RxD (P3.0): Serial input port
TxD (P3.1): Serial output port
INT0 (P3.2): External interrupt
INT1 (P3.3): External interrupt
CEX3/T0 (P3.4): Timer 0 external input; Capture/Compare External I/O for PCA module 3
CEX4/T1 (P3.5): Timer 1 external input; Capture/Compare External I/O for PCA module 4
WR (P3.6): External data memory write strobe
RD (P3.7): External data memory read strobe
.
2
2
C bus clock line (open drain)
C bus data line (open drain)
7
IL
SS
). Port 3 also serves the special features of the
permits a power-on reset using only an external capacitor to
NAME AND FUNCTION
NAME AND FUNCTION
P89C660/P89C662/P89C664/
IL
). Port 2 emits the high-order address byte
P89C668
Product data
IL
).