SX18AC/SO Parallax Inc, SX18AC/SO Datasheet - Page 16

• Manufacturer Part Number: SX18AC/SO
• Description: IC MCU 2K FLASH 50MHZ SO-18
• Manufacturer: Parallax Inc
• Series: SXr

Specifications of SX18AC/SO

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 50MHz
• Number Of I /o: 12
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 137 x 8
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -

SX18AC / SX20AC / SX28AC
7.0 POWER DOWN MODE
The power down mode is entered through the execution
of the SLEEP instruction while the SLEEP mode is
enabled.
In SLEEP mode, only the Watchdog Timer (WDT) is
active. If the Watchdog Timer is enabled, upon execution
of the SLEEP instruction, the Watchdog Timer is cleared,
the TO bit is set in the STATUS register, and the PD bit is
cleared in the STATUS register.
There are three different ways to exit from the low power
sleep mode: a timer overflow signal from the Watchdog
Timer (WDT), a valid transition on any of the Multi-Input
Wakeup pins (Port B pins), or through an external reset
input on the MCLR pin.
To achieve the lowest possible power consumption, the
Watchdog Timer should be disabled and the device
should exit the SLEEP mode through the MIWU pins or
an external reset.
7.1 Multi-Input Wakeup
Multi-Input Wakeup is one way of causing the device to
exit the power down mode. Port B is used to support this
© 1998 Scenix Semiconductor, Inc. All rights reserved.
8
8
8
MODE
W
MODE = 09
Figure 7-1. Multi-Input Wakeup Block Diagram
RB7
0 1
RB6
- 16 -
Wake-up : Exit Power Down
feature. The WKEN_B register (Wakeup Enable Regis-
ter) allows any Port B pin or combination of pins to cause
the wakeup. Clearing a bit in the WKEN_B register
enables the wakeup on the corresponding Port B pin. If
multi-input wakeup is selected to cause a wakeup, the
trigger condition on the selected pin can be either rising
edge (low to high) or falling edge (high to low). The
WKED_B register (Wakeup Edge Select) selects the
desired transition edge. Setting a bit in the WKED_B reg-
ister selects the falling edge on the corresponding Port B.
Resetting the bit selects the rising edge. The WKEN_B
and WKED_B registers are set to FFh upon reset.
Once a valid transition occurs on the selected pin, the
WKPND_B register (Wakeup Pending Register) latches
the transition in the corresponding bit position. A logic ‘1’
indicates the occurrence of the selected trigger edge on
the corresponding Port B pin.
Upon exiting the power down mode, the Multi-Input
Wakeup logic causes program counter to branch to the
maximum program memory address (same as reset).
Figure 7-1 shows the Multi-Input Wakeup block diagram.
RB1
RB0
Port B
Configured
as Input
WKED_B
WKPND_B
WKEN_B
0 = Enable
1 = Disable
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