SX18AC/SO Parallax Inc, SX18AC/SO Datasheet - Page 23

• Manufacturer Part Number: SX18AC/SO
• Description: IC MCU 2K FLASH 50MHZ SO-18
• Manufacturer: Parallax Inc
• Series: SXr

Specifications of SX18AC/SO

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 50MHz
• Number Of I /o: 12
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 137 x 8
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -

11.0 COMPARATOR
The device contains an on-chip differential comparator.
Ports RB0-RB2 support the comparator. Ports RB1 and
RB2 are the comparator negative and positive inputs,
respectively, while Port RB0 serves as the comparator
output pin. To use these pins in conjunction with the com-
parator, the user program must configure Ports RB1 and
RB2 as inputs and Port RB0 as an output. The CMP_B
register is used to enable the comparator, to read the out-
put of the comparator internally, and to enable the output
of the comparator to the comparator output pin.
The comparator enable bits are set to “1” upon reset,
thus disabling the comparator. To avoid drawing addi-
tional current during the SLEEP mode, the comparator
should be disabled before entering the SLEEP mode.
Here is an example of how to setup the comparator and
read the CMP_B register.
© 1998 Scenix Semiconductor, Inc. All rights reserved.
mov M,#$08
mov W,#$00
mov !RB,W
...
mov M,#$08
mov W,#$00
mov !RB,W
and W,#$01
RB0
RB1
RB2
;set MODE register to access
;CMP_B
;clear W
;enable comparator and its
;output
;delay after enabling
;comparator for response
;set MODE register to access
;CMP_B
;clear W
;enable comparator and its
;output and also read CMP_B
;(exchange W and CMB_B)
;set/clear Z flag based on
;comparator result
Figure 11-1. Comparator Block Diagram
Internal Data Bus
- 23 -
The final “mov” instruction in this example performs an
exchange of data between the working register (W) and
the CMP_B register. This exchange occurs only with Port
B accesses. Otherwise, the “mov” instruction does not
perform an exchange, but only moves data from the
source to the destination.
The following figure shows the format of the CMP_B reg-
ister.
CMP_B - Comparator Enable/Status Register
CMP_RES
CMP_OE
CMP_EN
CMP_EN
CMP_RES
snb $03.2
jmp rb2_hi
...
CMP_EN
CMP_OE
Bit 7
R
E
S
E
R
V
E
D
CMP_B
Point to CMP_B
CMP_OE
Comparator result: 1 for RB2>RB1 or 0
for RB2<RB1. Comparator must be en-
abled (CMP_EN = 0) to read the result.
The result can be read whether or not the
CMP_OE bit is cleared.
When cleared to 0, enables the compar-
ator output to the RB0 pin.
When cleared to 0, enables the compar-
ator.
7
6
0
Bit 6
;test Z flag in STATUS reg
;(0 => RB2<RB1)
;jump only if RB2>RB1
MODE = 08h
W
Reserved
SX18AC / SX20AC / SX28AC
Bits 5–1
MODE
www.scenix.com
CMP_RES
Bit 0