Z8F3201VN020SC00TR Zilog, Z8F3201VN020SC00TR Datasheet - Page 101
Z8F3201VN020SC00TR
Manufacturer Part Number
Z8F3201VN020SC00TR
Description
IC ENCORE MCU FLASH 32K 44PLCC
Manufacturer
Zilog
Series
Encore!®r
Datasheet
1.Z8F1601VN020EC.pdf
(246 pages)
Specifications of Z8F3201VN020SC00TR
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Z8F3201VN020SC00T
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Receiving Data using the Direct Memory Access Controller (DMA)
7. Write to the UART Control 0 register to:
8. Execute an EI instruction to enable interrupts.
The UART is now configured for interrupt-driven data reception. When the UART
Receiver interrupt is detected, the associated interrupt service routine (ISR) should per-
form the following:
9. Check the UART Status 0 register to determine the source of the interrupt - error,
10. If the interrupt was due to data available, read the data from the UART Receive Data
11. Clear the UART Receiver interrupt in the applicable Interrupt Request register.
12. Execute the IRET instruction to return from the interrupt-service routine and await
The DMA and UART can coordinate automatic data transfer from the UART Receive
Data register to general-purpose Register File RAM. This reduces the eZ8 CPU process-
ing overhead required to support UART data reception. The UART Receiver interrupt
must then only notify the eZ8 CPU of error conditions. Follow these steps to configure the
UART and DMA for automatic data handling:
1. Write to the DMA control registers to configure the DMA to transfer data from the
2. Write to the UART Baud Rate High and Low Byte registers to set the desired baud
3. Enable the UART pin functions by configuring the associated GPIO Port pins for
4. Write to the Interrupt control registers to enable the UART Receiver interrupt and set
5. Write to the UART Control 1 register to:
–
–
break, or received data.
register. If operating in Multiprocessor (9-bit) mode, first read the Multiprocessor
Receive flag (MPRX) to determine if the data was directed to this UART before
reading the data.
more data.
UART Receive Data register to general-purpose Register File RAM.
rate.
alternate function operation.
the desired priority.
–
–
Set the receive enable bit (REN) to enable the UART for data reception
Enable parity, if desired, and select either even or odd parity.
Enable Multiprocessor (9-bit) mode functions, if desired.
Disable the UART interrupt for received data by clearing RDAIRQ to 0.
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!
UART
®
83
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