CY8C25122-24PXI Cypress Semiconductor Corp, CY8C25122-24PXI Datasheet - Page 86

• Manufacturer Part Number: CY8C25122-24PXI
• Description: IC MCU 4K FLASH 256B 8-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ CY8C25xxxr

Specifications of CY8C25122-24PXI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.25 V
• Data Converters: A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.9.2.3
The ACMux, as shown in Analog Switch Cap Type A
Block xx Control 1 Register, controls the input muxing for
both the A and C capacitor branches. The high order bit,
ACMux[2], selects one of two inputs for the C branch.
10.9.2.4
10.9.3 Registers
10.9.3.1
FCap controls the size of the switched feedback capaci-
tor in the integrator.
ClockPhase controls the internal clock phasing relative
to the input clock phasing. ClockPhase affects the output
of the analog column bus which is controlled by the
Table 68:
86
Bit Name
Read/
Write
Bit #
POR
ACMux
BMuxSCA/SCB
Analog Switch Cap Type A Block xx
Control 0 Register
Analog Switch Cap Type A Block xx Control 0 Register
FCap
RW
7
0
P2.3
(2)
ClockPhase
RW
ACA
ASA
ASB
00
10
20
6
0
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Figure 24: BMuxSCA/SCB Connections
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
(1)
(1)
ASign
RW
5
0
B Input Multiplexer Connections
TRefGND
ACA
ASB
ASA
01
11
21
ACap[4]
RW
(2)
(2)
4
0
However, when the bit is high, it also overrides the two
low order bits, forcing the A and C branches to the same
source. The resulting condition is used to construct low
pass biquad filters. See the individual AMux and CMux
diagrams.
AnalogBus bit in Control 2 Register (ASA10CR2,
ASA12CR2, ASA21CR2, ASA23CR2).
ASign controls the switch phasing of the switches on the
bottom plate of the ACap capacitor. The bottom plate
samples the input or the reference.
The ACap bits set the value of the capacitor in the A
path.
ACA
ASA
ASB
02
12
22
ACap[3]
RW
3
0
(1)
(1)
ACap[2]
ACA
ABUS3
ASB
ASA
03
13
23
RW
2
0
(2)
P2.0
ACap[1]
RW
1
0
September 5, 2002
ACap[0]
RW
0
0