MC68HC908AB32CFU Freescale Semiconductor, MC68HC908AB32CFU Datasheet - Page 323

• Manufacturer Part Number: MC68HC908AB32CFU
• Description: IC MCU 8MHZ 32K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AB32CFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

17.6 Port D
17.6.1 Port D Data Register (PTD)
MC68HC908AB32
Freescale Semiconductor
Additional Functions:
Alternative Function:
—
Rev. 1.1
Address:
Port D is an 8-bit special function port that shares two of its pins with the
timer interface module (see
(TIMA)
port D pin has 15mA current drive (sink) and programmable pullup.
The port D data register contains a data latch for each of the eight port D
pins.
PTD[7:0] — Port D Data Bits
TACLK — Timer A Clock Input
TBCLK — Timer B Clock Input
Reset:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port D pin is under the control of the corresponding bit in data
direction register D. Reset has no effect on port D data.
The PTD6 pin becomes TACLK, the timer A (TIMA) external clock
input when the TIMA prescaler select bits, PS[2:0] = 111. See
Section 11. Timer Interface Module A
The PTD4 pin becomes TBCLK, the timer B (TIMB) external clock
input when the TIMB prescaler select bits, PS[2:0] = 111. See
Section 12. Timer Interface Module B
Input pullup Input pullup Input pullup Input pullup Input pullup Input pullup Input pullup Input pullup
15mA sink 15mA sink 15mA sink 15mA sink 15mA sink 15mA sink 15mA sink 15mA sink
and
$0003
PTD7
Bit 7
Figure 17-11. Port D Data Register (PTD)
Section 12. Timer Interface Module B
Input/Output (I/O) Ports
TACLK
PTD6
6
PTD5
5
Section 11. Timer Interface Module A
Unaffected by reset
TBCLK
PTD4
4
PTD3
3
(TIMA).
(TIMB).
PTD2
2
Input/Output (I/O) Ports
(TIMB)). Each
PTD1
1
Technical Data
PTD0
Bit 0
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