MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 133

• Manufacturer Part Number: MC68HC912B32CFU8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC68HC912B32CFU8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

11.2.9 PWM Channel Counters 0–3
Read: Anytime
Write: Anytime
A write causes the PWM counter to reset to $00.
In special mode, if DISCR = 1, a write does not reset the PWM counter.
Each counter may be read anytime without affecting the count or the operation of the corresponding PWM
channel. Writes to a counter cause the counter to be reset to $00 and force an immediate load of both
duty and period registers with new values. To avoid a truncated PWM period, write to a counter while the
counter is disabled. In left-aligned output mode, resetting the counter and starting the waveform output is
controlled by a match between the period register and the value in the counter. In center-aligned output
mode, the counters operate as up/down counters, where a match in period changes the counter direction.
The duty register changes the state of the output during the period to determine the duty.
When a channel is enabled, the associated PWM counter starts at the count in the PWCNTx register
using the clock selected for that channel.
In special mode, when DISCP = 1 and is configured for left-aligned output, a match of period does not
reset the associated PWM counter.
Freescale Semiconductor
Address: $0048
Address: $0049
Address: $004A
Address: $004B
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
Figure 11-12. PWM Channel Counter 0 (PWCNT0)
Figure 11-13. PWM Channel Counter 1 (PWCNT1)
Figure 11-14. PWM Channel Counter 2 (PWCNT2)
Figure 11-15. PWM Channel Counter 3 (PWCNT3)
Bit 6
Bit 6
Bit 6
Bit 6
6
0
6
0
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
Bit 5
Bit 5
Bit 5
Bit 5
5
0
5
0
5
0
5
0
Bit 4
Bit 4
Bit 4
Bit 4
4
0
4
0
4
0
4
0
Bit 3
Bit 3
Bit 3
Bit 3
3
0
3
0
3
0
3
0
Bit 2
Bit 2
Bit 2
Bit 2
2
0
2
0
2
0
2
0
Bit 1
Bit 1
Bit 1
Bit 1
1
0
1
0
1
0
1
0
PWM Register Descriptions
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
0
0
0
0
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