MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 185

• Manufacturer Part Number: MC68332ACFC25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACFC25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

MC68332
USER’S MANUAL
2A, 3A ECLK Pulse Width
2B, 3B External Clock Input High/Low Time
4A, 5A Rise and Fall Time — All Outputs except CLKOUT
4B, 5B External Clock Rise and Fall Time
Num
12A
14A
14B
27A
29A
2, 3
4, 5
1A
1B
9A
9C
F1
11
12
13
14
15
16
17
18
20
21
22
23
24
25
26
27
28
29
30
1
6
7
8
9
Frequency of Operation (32.768 kHz crystal)
Clock Period
ECLK Period
External Clock Input Period
Clock Pulse Width
Clock Rise and Fall Time
Clock High to Address, FC, SIZE, RMC Valid
Clock High to Address, Data, FC, SIZE, RMC High Impedance
Clock High to Address, FC, SIZE, RMC Invalid
Clock Low to AS, DS, CS Asserted
AS to DS or CS Asserted (Read)
Clock Low to IFETCH, IPIPE Asserted
Address, FC, SIZE, RMC Valid
Clock Low to AS, DS, CS Negated
Clock Low to IFETCH, IPIPE Negated
AS, DS, CS Negated to
AS, CS Width Asserted
DS, CS Width Asserted (Write)
AS, CS Width Asserted (Fast Write Cycle)
AS, DS, CS Width Negated
Clock High to AS, DS, R/W High Impedance
AS, DS, CS Negated to R/W Negated
Clock High to R/W High
Clock High to R/W Low
R/W Asserted to AS, CS Asserted
R/W Low to DS, CS Asserted (Write)
Clock High to Data Out Valid
Data Out Valid to Negating Edge of AS, CS
DS, CS Negated to Data Out Invalid (Data Out Hold)
Data Out Valid to DS, CS Asserted (Write)
Data In Valid to Clock Low (Data Setup)
Late BERR, HALT Asserted to Clock Low (Setup Time)
AS, DS Negated to DSACK[1:0], BERR, HALT, AVEC Negated
DS, CS Negated to Data In Invalid (Data In Hold)
DS, CS Negated to Data In High Impedance
CLKOUT Low to Data In Invalid (Fast Cycle Hold)
to AS, CS Asserted
Address, FC, SIZE Invalid (Address Hold)
(V
DD
Freescale Semiconductor, Inc.
and V
For More Information On This Product,
Table A-6a. 20.97 MHz AC Timing
Characteristic
3
6
ELECTRICAL CHARACTERISTICS
DDSYN
5
Go to: www.freescale.com
4
= 5.0 Vdc
3
7, 8
2
5%, V
7
7
SS
= 0 Vdc, T
A
Symbol
= T
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DVASN
t
t
t
CHAZx
CHAZn
t
t
t
t
SWAW
SWDW
SNDOI
BELCL
t
t
t
t
t
t
t
t
CHRH
CHDO
t
t
t
t
CHAV
CHSZ
SNRN
CHRL
RAAA
RASA
DVSA
SNDN
XCHL
CLSA
STSA
AVSA
CLSN
t
SNDI
SHDI
t
ECW
CLIA
CLIN
SNAI
SWA
DICL
CLDI
Ecyc
Xcyc
t
t
XCrf
CW
cyc
Crf
SN
t
L
f
rf
to T
H
)
0.13
47.7
47.7
18.8
23.8
Min
381
183
–10
10
10
80
36
32
32
10
10
54
10
10
10
15
10
—
—
—
—
—
—
0
0
0
0
2
2
2
0
0
5
0
0
20.97
Max
—
—
—
—
—
—
23
47
—
23
10
22
—
23
22
—
—
—
—
—
47
—
23
23
—
—
23
—
—
—
—
—
60
—
48
—
5
8
5
MHz
Unit
A-11
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns