MC912DT128ACPV Freescale Semiconductor, MC912DT128ACPV Datasheet - Page 385
MC912DT128ACPV
Manufacturer Part Number
MC912DT128ACPV
Description
IC 8MHZ 16 BIT MICROCONTROLLER
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912DG128ACPVER.pdf
(478 pages)
Specifications of MC912DT128ACPV
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
KMC912DT128ACPV
Q1195202
Q1195202
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MC68HC912DT128A — Rev 4.0
MOTOROLA
Number of Conversions per Sequence
Table 19-7. Result Register Assignment for Different Conversion
SCAN — Continuous Conversion Sequence Mode
The result register assignments made to a conversion sequence follow
a few simple rules. Normally, the first result is placed in the first register;
the second result is placed in the second register, and so on.
7
lengths that are normally made. If FIFO mode is used, the result
register assignments differ. The results are placed in consecutive
registers between conversion sequences; the result register mapping
wraps around when the end of the register file is reached.
The scan mode bit controls whether or not conversion sequences are
performed continuously or not. If this control bit is 0, a write to control
register 4 or 5 will initiate a conversion sequence; the conversion
sequence will be executed; the sequence complete flag (SCF) will be
set, and the module will return to idle mode. In this mode, the module
remains powered up but no conversions are performed; the module
waits for the next conversion sequence to be initiated.
If this control bit is 1, a single conversion sequence initiation will result
in a continuously executed conversion sequence. When a conversion
sequence completes, the sequence complete flag (SCF) is set and a
new sequence is immediately begun. The conversion mode
characteristics of each sequence are identical. If a new conversion
Freescale Semiconductor, Inc.
presents the result register assignments for the various conversion
For More Information On This Product,
0 = Perform a conversion sequence and return to idle mode
1 = Perform conversion sequences continuously (scan mode)
Table 19-6. Conversion Sequence Length Coding
1
4
8
Analog-to-Digital Converter
Go to: www.freescale.com
S8C
0
0
1
S1C
X
0
1
Sequences
Number of Conversions per
Result Register Assignment
Sequence
ADR0 through ADR3
ADR0 through ADR7
4
1
8
ADR0
Analog-to-Digital Converter
Technical Data
ATD Registers
Table 19-
385
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