MC68HC908GR8CP Freescale Semiconductor, MC68HC908GR8CP Datasheet - Page 186

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MC68HC908GR8CP

Manufacturer Part Number
MC68HC908GR8CP
Description
IC MCU FLASH 8BIT 8MHZ 4K 28-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC68HC908GR8CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Low-Voltage Inhibit (LVI)
14.4.1 Polled LVI Operation
14.4.2 Forced Reset Operation
14.4.3 Voltage Hysteresis Protection
Technical Data
186
Addr.
$FE0C
Register Name
LVI Status Register
(LVISR)
In applications that can operate at V
software can monitor V
register, the LVIPWRD bit must be at logic 0 to enable the LVI module,
and the LVIRSTD bit must be at logic 1 to disable LVI resets.
In applications that require V
enabling LVI resets allows the LVI module to reset the MCU when V
falls below the V
and LVIRSTD bits must be at logic 0 to enable the LVI module and to
enable LVI resets.
Once the LVI has triggered (by having V
will maintain a reset condition until V
voltage, V
continually entering and exiting reset if V
V
Reset:
Read: LVIOUT
TRIPF
Write:
Freescale Semiconductor, Inc.
Figure 14-2. LVI I/O Register Summary
For More Information On This Product,
. V
Bit 7
TRIPR
0
TRIPR
Go to: www.freescale.com
Low-Voltage Inhibit (LVI)
= Unimplemented
. This prevents a condition in which the MCU is
is greater than V
TRIPF
6
0
0
level. In the configuration register, the LVIPWRD
DD
5
by polling the LVIOUT bit. In the configuration
0
0
DD
to remain above the V
TRIPF
4
0
0
DD
DD
by the hysteresis voltage, V
levels below the V
rises above the rising trip point
DD
DD
3
0
0
fall below V
is approximately equal to
MC68HC908GR8 — Rev 4.0
2
0
0
TRIPF
TRIPF
TRIPF
1
0
0
level,
), the LVI
MOTOROLA
level,
Bit 0
HYS
0
0
DD
.

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