MC68HC908GR8CP Freescale Semiconductor, MC68HC908GR8CP Datasheet - Page 279

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MC68HC908GR8CP

Manufacturer Part Number
MC68HC908GR8CP
Description
IC MCU FLASH 8BIT 8MHZ 4K 28-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC68HC908GR8CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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19.4.2.2 Computer Operating Properly (COP) Reset
MC68HC908GR8 — Rev 4.0
MOTOROLA
CGMXCLK
CGMOUT
PORRST
OSC1
RST
IAB
An input to the SIM is reserved for the COP reset signal. The overflow of
the COP counter causes an internal reset and sets the COP bit in the
SIM reset status register (SRSR). The SIM actively pulls down the RST
pin for all internal reset sources.
To prevent a COP module timeout, write any value to location $FFFF.
Writing to location $FFFF clears the COP counter and bits 12 through 4
of the SIM counter. The SIM counter output, which occurs at least every
2
serviced as soon as possible out of reset to guarantee the maximum
amount of time before the first timeout.
13
CYCLES
Freescale Semiconductor, Inc.
4096
– 2
For More Information On This Product,
The internal reset signal is asserted.
The SIM enables CGMOUT.
Internal clocks to the CPU and modules are held inactive for 4096
CGMXCLK cycles to allow stabilization of the oscillator.
The RST pin is driven low during the oscillator stabilization time.
The POR bit of the SIM reset status register (SRSR) is set and all
other bits in the register are cleared.
4
CGMXCLK cycles, drives the COP counter. The COP should be
Figure 19-7. POR Recovery
System Integration Module (SIM)
CYCLES
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32
CYCLES
32
$FFFE
System Integration Module (SIM)
Reset and System Initialization
$FFFF
Technical Data
279

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