MC68HC908GR16CFJ Freescale Semiconductor, MC68HC908GR16CFJ Datasheet - Page 101

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MC68HC908GR16CFJ

Manufacturer Part Number
MC68HC908GR16CFJ
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR16CFJ

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908GR16CFJ
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
When an interrupt pin is both falling-edge and low-level triggered (MODE = 1), the interrupt remains set
until both of these events occur:
The vector fetch or software clear may occur before or after the interrupt pin returns to 1. As long as the
pin is low, the interrupt request remains pending. A reset will clear the latch and the MODE control bit,
thereby clearing the interrupt even if the pin stays low.
When set, the IMASK bit in the INTSCR mask all external interrupt requests. A latched interrupt request
is not presented to the interrupt priority logic unless the IMASK bit is clear.
Freescale Semiconductor
$001D
Addr.
Vector fetch or software clear
Return of the interrupt pin to 1
IRQ
IRQ Status and Control
Register Name
Register (INTSCR)
The interrupt mask (I) in the condition code register (CCR) masks all
interrupt requests, including external interrupt requests.
DECODER
V
VECTOR
See page 103.
FETCH
DD
RESET
ACK
INTERNAL
PULLUP
DEVICE
Reset:
Read:
Write:
Figure 8-2. IRQ Module Block Diagram
Figure 8-3. IRQ I/O Register Summary
V
MODE
DD
MC68HC908GR16 Data Sheet, Rev. 5.0
Bit 7
0
0
D
CK
CLR
= Unimplemented
Q
6
0
0
NOTE
5
0
0
IMASK
SYNCHRONIZER
4
0
0
VOLTAGE
DETECT
HIGH
IRQF
3
0
ACK
2
0
0
IRQF
Functional Description
IMASK
1
0
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQ
INTERRUPT
REQUEST
TO MODE
SELECT
LOGIC
MODE
Bit 0
0
101

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