MC68HC908GR16CFJ Freescale Semiconductor, MC68HC908GR16CFJ Datasheet - Page 225

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MC68HC908GR16CFJ

Manufacturer Part Number
MC68HC908GR16CFJ
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR16CFJ

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908GR16CFJ
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
18.4.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs. The prescaler generates seven clock
rates from the internal bus clock. The prescaler select bits, PS[2:0], in the TIM status and control register
select the TIM clock source.
18.4.2 Input Capture
With the input capture function, the TIM can capture the time at which an external event occurs. When an
active edge occurs on the pin of an input capture channel, the TIM latches the contents of the TIM counter
Freescale Semiconductor
Addr.
$002C
$002D
$002E
$002F
$0030
$0031
$0032
$0033
$0034
$0035
Timer 2 Counter Modulo Reg-
Timer 2 Channel 0 Status and
Timer 2 Channel 1 Status and
Control Register (T2SC0)
Control Register (T2SC1)
Register High (T2CNTH)
Register High (T2CH0H)
Register High (T2CH1H)
Timer 2 Counter Modulo
Register Low (T2MODL)
Register Low (T2CNTL)
Register Low (T2CH0L)
Register Low (T2CH1L)
Register Name
ister High (T2MODH)
Timer 2 Channel 0
Timer 2 Channel 0
Timer 2 Channel 1
Timer 2 Channel 1
Timer 2 Counter
Timer 2 Counter
See page 232.
See page 232.
See page 233.
See page 233.
See page 233.
See page 236.
See page 236.
See page 234.
See page 236.
See page 236.
Figure 18-3. TIM I/O Register Summary (Sheet 2 of 2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Bit 15
Bit 15
CH0F
Bit 15
CH1F
Bit 15
MC68HC908GR16 Data Sheet, Rev. 5.0
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
1
1
0
0
0
0
= Unimplemented
CH0IE
CH1IE
14
14
14
14
6
0
6
0
1
6
1
0
6
0
6
MS0B
13
13
13
13
5
0
5
0
1
5
1
0
5
0
0
5
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
MS0A
MS1A
12
12
12
12
4
0
4
0
1
4
1
0
4
0
4
ELS0B
ELS1B
11
11
11
11
3
0
3
0
1
3
1
0
3
0
3
ELS0A
ELS1A
10
10
10
10
2
0
2
0
1
2
1
0
2
0
2
Functional Description
TOV0
TOV1
1
9
0
1
0
9
1
1
1
0
9
1
0
9
1
CH0MAX
CH1MAX
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
0
1
1
0
0
225

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