MC68HC908GT16CFB Freescale Semiconductor, MC68HC908GT16CFB Datasheet - Page 59

• Manufacturer Part Number: MC68HC908GT16CFB
• Description: IC MCU 16K FLASH 8MHZ SPI 44PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GT16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 36
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

EXTCLKEN — External Clock Enable Bit
OSCENINSTOP — Oscillator Enable In Stop Mode Bit
COPRS — COP Rate Select Bit
LVISTOP — LVI Enable in Stop Mode Bit
LVIRSTD — LVI Reset Disable Bit
Freescale Semiconductor
EXTCLKEN
EXTCLKEN enables an external clock source or crystal/ceramic resonator to be used as a clock input.
Setting this bit enables PTE4/OSC1 pin to be a clock input pin. Clearing this bit (default setting) allows
the PTE4/OSC1 and PTE3/OSC2 pins to function as a general-purpose input/output (I/O) pin. Refer
to
(ICG) Module)
OSCENINSTOP, when set, will enable the internal clock generator module to continue to generate
clocks (either internal, ICLK, or external, ECLK) in stop mode. See
(ICG)
stops. See
ICLK and ECLK will be forced low during stop mode. The default state for this option is clear, disabling
the ICG in stop mode.
COPD selects the COP timeout period. Reset clears COPRS. See
Properly (COP) Module
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
LVIRSTD disables the reset signal from the LVI module. See
Table 4-1
Configuration Bits
1 = Allows PTE4/OSC1 to be an external clock connection
0 = PTE4/OSC1 and PTE3/OSC2 function as I/O port pins (default).
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode (default)
1 = COP timeout period = 8176 COPCLK cycles
0 = COP timeout period = 262,128 COPCLK cycles
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets disabled
0 = LVI module resets enabled
0
0
1
1
External Clock
Module). This function is used to keep the timebase running while the rest of the microcontroller
Chapter 17 Timebase Module
This bit has the same functionality as the OSCSTOPENB CONFIG bit in
MC68HC908GP32 and MC68HC908GR8 parts.
EXTXTALEN
for configuration options for the external source. See
for a more detailed description of the external clock operation.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
0
1
0
1
PTE4/OSC1
Table 4-1. External Clock Option Settings
OSC1
OSC1
PTE4
PTE4
Function
Pin
PTE3/OSC2
(TBM). When clear, all clock generation will cease and both
OSC2
PTE3
PTE3
PTE3
NOTE
Default setting — external oscillator disabled
External oscillator disabled since EXTCLKEN not set
External oscillator configured for an external clock source
input (square wave) on OSC1
External oscillator configured for an external crystal
configuration on OSC1 and OSC2. System will also
operate with square-wave clock source in OSC1.
Chapter 10 Low-Voltage Inhibit
Chapter 7 Internal Clock Generator
Chapter 7 Internal Clock Generator
Chapter 5 Computer Operating
Description
Functional Description
(LVI).
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