MC68HC908SR12CB Freescale Semiconductor, MC68HC908SR12CB Datasheet - Page 197

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MC68HC908SR12CB

Manufacturer Part Number
MC68HC908SR12CB
Description
IC MCU 12K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908SR12CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
29
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
NOTE:
NOTE:
TSTOP — TIM Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode.
TRST — TIM Reset Bit
Setting the TSTOP and TRST bits simultaneously stops the TIM counter
at a value of $0000.
PS[2:0] — Prescaler Select Bits
This read/write bit stops the TIM counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIM
counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIM counter and the TIM
prescaler. Setting TRST has no effect on any other registers.
Counting resumes from $0000. TRST is cleared automatically after
the TIM counter is reset and always reads as logic 0. Reset clears the
TRST bit.
These read/write bits select one of the seven prescaler outputs as the
input to the TIM counter as
PS[2:0] bits.
PS2
0
0
0
0
1
1
1
1
1 = TIM counter stopped
0 = TIM counter active
1 = Prescaler and TIM counter cleared
0 = No effect
Timer Interface Module (TIM)
PS1
0
0
1
1
0
0
1
1
Table 11-2. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
Table 11-2
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
shows. Reset clears the
TIM Clock Source
Not available
Timer Interface Module (TIM)
I/O Registers
Data Sheet
197

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