MC912D60ACPV8 Freescale Semiconductor, MC912D60ACPV8 Datasheet - Page 377
MC912D60ACPV8
Manufacturer Part Number
MC912D60ACPV8
Description
IC MCU 6K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912D60ACFUE8.pdf
(460 pages)
Specifications of MC912D60ACPV8
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Technical Data — MC68HC912D60A
19.1 Contents
19.2 Introduction
19.3 Instruction Queue
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
19.2
19.3
19.4
19.5
19.6
Development support involves complex interactions between
MC68HC912D60A resources and external development systems. The
following section concerns instruction queue and queue tracking signals,
background debug mode, and instruction tagging.
The CPU12 instruction queue provides at least three bytes of program
information to the CPU when instruction execution begins. The CPU12
always completely finishes executing an instruction before beginning to
execute the next instruction. Status signals IPIPE[1:0] provide
information about data movement in the queue and indicate when the
CPU begins to execute instructions. This makes it possible to monitor
CPU activity on a cycle-by-cycle basis for debugging. Information
available on the IPIPE[1:0] pins is time multiplexed. External circuitry
can latch data movement information on rising edges of the ECLK
signal; execution start information can be latched on falling edges.
19-1
shows the meaning of data on the pins.
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
Instruction Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .377
Background Debug Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 379
Breakpoints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395
Instruction Tagging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
Development Support
Section 19. Development Support
Technical Data
Table
377
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