C8051F133 Silicon Laboratories Inc, C8051F133 Datasheet - Page 188
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C8051F133
Manufacturer Part Number
C8051F133
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F13xr
Specifications of C8051F133
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit to 12 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Other names
336-1150
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F133
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Part Number:
C8051F133-GQ
Manufacturer:
SILICON
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Part Number:
C8051F133-GQ
Manufacturer:
SiliconL
Quantity:
570
Company:
Part Number:
C8051F133-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F133-GQR
Manufacturer:
ST
Quantity:
101
Company:
Part Number:
C8051F133-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
188
Bits 7–6: Reserved.
Bits 5–4: CLKDIV1–0: Output SYSCLK Divide Factor.
Bits 3–2: Reserved.
Bits 1–0: CLKSL1–0: System Clock Source Select Bits.
R/W
Bit7
-
These bits can be used to pre-divide SYSCLK before it is output to a port pin through the
crossbar.
00: Output will be SYSCLK.
01: Output will be SYSCLK/2.
10: Output will be SYSCLK/4.
11: Output will be SYSCLK/8.
See
put to a port pin.
00: SYSCLK derived from the Internal Oscillator, and scaled as per the IFCN bits in
OSCICN.
01: SYSCLK derived from the External Oscillator circuit.
10: SYSCLK derived from the PLL.
11: Reserved.
Section “18. Port Input/Output” on page 235
R/W
Bit6
SFR Definition 14.3. CLKSEL: System Clock Selection
-
CLKDIV1 CLKDIV0
R/W
Bit5
R/W
Bit4
Rev. 1.4
R/W
Bit3
-
R/W
Bit2
-
for more details about routing this out-
CLKSL1
R/W
Bit1
SFR Address:
CLKSL0 00000000
SFR Page:
R/W
Bit0
0x97
F
Reset Value
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