MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 197

• Manufacturer Part Number: MC68HC908LB8CPE
• Description: IC MCU 8K FLASH 8MHZ 20DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908LB8CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVR, POR, PWM
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

18.8.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
18.8.4 TIM Channel Status and Control Registers
Each of the TIM channel status and control registers:
Freescale Semiconductor
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Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture trigger
Address: $0023
Address: $0024
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset the TIM counter before writing to the TIM counter modulo registers.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 18-8. TIM Counter Modulo Register High (TMODH)
Figure 18-9. TIM Counter Modulo Register Low (TMODL)
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
1
1
Figure 18-7. TIM Counter Registers Low (TCNTL)
= Unimplemented
14
6
6
0
6
1
6
6
1
MC68HC908LB8 Data Sheet, Rev. 1
13
5
5
0
5
1
5
5
1
NOTE
NOTE
12
4
4
0
4
1
4
4
1
11
3
3
0
3
1
3
3
1
10
2
2
0
2
1
2
2
1
1
1
0
1
9
1
1
1
1
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
0
1
1
I/O Registers
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