MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 200

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MC68HC908LB8CPE

Manufacturer Part Number
MC68HC908LB8CPE
Description
IC MCU 8K FLASH 8MHZ 20DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LB8CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVR, POR, PWM
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LB8CPE
Manufacturer:
IR
Quantity:
10
Timer Interface Module (TIM)
TOVx — Toggle On Overflow Bit
CHxMAX — Channel x Maximum Duty Cycle Bit
200
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIM counter overflows. When channel x is an input capture channel, TOVx has no
effect.
Reset clears the TOVx bit.
When the TOVx bit is at 1, setting the CHxMAX bit forces the duty cycle of buffered and unbuffered
PWM signals to 100%. As
or cleared. The output stays at the 100% duty cycle level until the cycle after CHxMAX is cleared.
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
MSxB:MSxA
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX
TCHx
X0
X1
1X
1X
1X
00
00
00
01
01
01
OVERFLOW
Table 18-2. Mode, Edge, and Level Selection
ELSxB:ELSxA
Figure 18-12
COMPARE
PERIOD
OUTPUT
00
00
01
10
11
01
10
11
01
10
11
Figure 18-12. CHxMAX Latency
OVERFLOW
MC68HC908LB8 Data Sheet, Rev. 1
shows, the CHxMAX bit takes effect in the cycle after it is set
COMPARE
OUTPUT
or buffered PWM
Output compare
Buffered output
Output preset
Input capture
NOTE
compare
or PWM
Mode
OVERFLOW
COMPARE
OUTPUT
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or
falling edge
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
OVERFLOW
Configuration
COMPARE
OUTPUT
OVERFLOW
Freescale Semiconductor

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