M30262F8GP#U5 Renesas Electronics America, M30262F8GP#U5 Datasheet - Page 218
![IC M16C/TINY MCU FLASH 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
M30262F8GP#U5
Manufacturer Part Number
M30262F8GP#U5
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M30262F4GPU3.pdf
(41 pages)
3.M30262F4GPU3.pdf
(241 pages)
Specifications of M30262F8GP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
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Renesas Electronics America
Quantity:
10 000
Part Number:
M30262F8GP#U5M30262F8GP#D5
Manufacturer:
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Appendix Standard Serial I/O Mode 1 (Flash Memory Version)
Figure 1.22.4. Timing for clearing the status register
Figure 1.22.5. Timing for the page program
Clear Status Register Command
Page Program Command
This command clears the bits (SR4, SR5) which are set when the status register operation ends in error.
When the “50
clear status register operation ends, the RTS
This command writes the specified page (256 bytes) in the flash memory sequentially one byte at a
time. Execute the page program command as explained here following.
When reception setup for the next 256 bytes ends, the RTS
the “L” level. The result of the page program can be known by reading the status register. For more
information, see the section on the status register.
Each block can be write-protected with the lock bit. For more information, see the section on the data
protection function. Additional writing is not allowed with already programmed pages.
(M16C reception data)
(M16C transmit data)
(1) Transfer the “41
(2) Transfer addresses A
(3) From the 4th byte onward, as write data (D
A
Preliminary Specifications Rev. 0.9
8
Specifications in this manual are tentative and subject to change.
to A
RTS1(BUSY)
23
16
is input sequentially from the smallest address first, that page is automatically written.
” command code is sent with the 1st byte, the aforementioned bits are cleared. When the
CLK1
RxD1
TxD1
(M16C reception data)
(M16C transmit data)
16
” command code with the 1st byte.
8
RTS1(BUSY)
to A
41
15
Renesas Technology Corp.
16
and A
CLK1
RxD1
TxD1
A
A
8
16
15
to
to A
1
(BUSY) signal changes from the “H” to the “L” level.
0
A
23
–D
A
16
with the 2nd and 3rd bytes respectively.
23
7
50
to
) for the page (256 bytes) specified with addresses
16
data0
1
(BUSY) signal changes from the “H” to
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
data255
M16C/26 Group
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