MC9S08GT32CFDER Freescale Semiconductor, MC9S08GT32CFDER Datasheet - Page 199
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MC9S08GT32CFDER
Manufacturer Part Number
MC9S08GT32CFDER
Description
IC MCU 32K FLASH 2K RAM 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.M68EVB908GB60E.pdf
(290 pages)
Specifications of MC9S08GT32CFDER
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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BIDIROE — Bidirectional Mode Output Enable
SPISWAI — SPI Stop in Wait Mode
SPC0 — SPI Pin Control 0
12.4.3
This register is used to set the prescaler and bit rate divisor for an SPI master. This register may be read or
written at any time.
SPPR2:SPPR1:SPPR0 — SPI Baud Rate Prescale Divisor
Freescale Semiconductor
When bidirectional mode is enabled by SPI pin control 0 (SPC0) = 1, BIDIROE determines whether
the SPI data output driver is enabled to the single bidirectional SPI I/O pin. Depending on whether the
SPI is configured as a master or a slave, it uses either the MOSI1 (MOMI) or MISO1 (SISO) pin,
respectively, as the single SPI data I/O pin. When SPC0 = 0, BIDIROE has no meaning or effect.
The SPC0 bit chooses single-wire bidirectional mode. If MSTR = 0 (slave mode), the SPI uses the
MISO1 (SISO) pin for bidirectional SPI data transfers. If MSTR = 1 (master mode), the SPI uses the
MOSI1 (MOMI) pin for bidirectional SPI data transfers. When SPC0 = 1, BIDIROE is used to enable
or disable the output driver for the single bidirectional SPI I/O pin.
This 3-bit field selects one of eight divisors for the SPI baud rate prescaler as shown in
input to this prescaler is the bus rate clock (BUSCLK). The output of this prescaler drives the input of
the SPI baud rate divider (see
1 = SPI I/O pin enabled as an output.
0 = Output driver disabled so SPI data I/O pin acts as an input.
1 = SPI clocks stop when the MCU enters wait mode.
0 = SPI clocks continue to operate in wait mode.
1 = SPI configured for single-wire bidirectional operation.
0 = SPI uses separate pins for data input and data output.
SPI Baud Rate Register (SPI1BR)
Reset:
Read:
Write:
Figure 12-9. SPI Baud Rate Register (SPI1BR)
Bit 7
0
0
Figure
MC9S08GB/GT Data Sheet, Rev. 2.3
= Unimplemented or Reserved
SPPR2
6
0
12-4).
SPPR1
5
0
SPPR0
4
0
3
0
0
SPR2
2
0
SPI Registers and Control Bits
SPR1
1
0
Table
SPR0
Bit 0
0
12-2. The
199
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